DocID018909 Rev 11 441/1731
RM0090 Digital-to-analog converter (DAC)
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Figure 68. DAC LFSR register calculation algorithm
The LFSR value, that may be masked partially or totally by means of the MAMPx[3:0] bits in
the DAC_CR register, is added up to the DAC_DHRx contents without overflow and this
value is then stored into the DAC_DORx register.
If LFSR is 0x0000, a ‘1 is injected into it (antilock-up mechanism).
It is possible to reset LFSR wave generation by resetting the WAVEx[1:0] bits.
Figure 69. DAC conversion (SW trigger enabled) with LFSR wave generation
Note: The DAC trigger must be enabled for noise generation by setting the TENx bit in the
DAC_CR register.
14.3.9 Triangle-wave generation
It is possible to add a small-amplitude triangular waveform on a DC or slowly varying signal.
DAC triangle-wave generation is selected by setting WAVEx[1:0] to “10”. The amplitude is
configured through the MAMPx[3:0] bits in the DAC_CR register. An internal triangle counter
is incremented three APB1 clock cycles after each trigger event. The value of this counter is
then added to the DAC_DHRx register without overflow and the sum is stored into the
DAC_DORx register. The triangle counter is incremented as long as it is less than the
maximum amplitude defined by the MAMPx[3:0] bits. Once the configured amplitude is
reached, the counter is decremented down to 0, then incremented again and so on.
It is possible to reset triangle wave generation by resetting the WAVEx[1:0] bits.
11 10 9 8 7 6 5 4 3 2 1 0
12
NOR
X
12
X
0
X
X
4
X
6
XOR
ai14713b
APB1_CLK
0x00
0xAAA
DHR
DOR
ai14714
0xD55
SWTRIG
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