STMicroelectronics STM32F407 User Manual

DocID018909 Rev 11 73/1731
RM0090 Embedded Flash memory interface
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3 Embedded Flash memory interface
3.1 Introduction
The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash
memory. It implements the erase and program Flash memory operations and the read and
write protection mechanisms.
The Flash memory interface accelerates code execution with a system of instruction
prefetch and cache lines.
3.2 Main features
• Flash memory read operations
• Flash memory program/erase operations
• Read / write protections
• Prefetch on I-Code
• 64 cache lines of 128 bits on I-Code
• 8 cache lines of 128 bits on D-Code
Figure 3 shows the Flash memory interface connection inside the system architecture.
Figure 3. Flash memory interface connection inside system architecture
(STM32F405xx/07xx and STM32F415xx/17xx)
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STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English