DocID018909 Rev 11 1525/1731
RM0090 USB on-the-go high-speed (OTG_HS)
1529
1. To save power, the application suspends and turns off port power when the bus is idle
by writing the port suspend and port power bits in the host port control and status
register.
2. PHY indicates port power off by deasserting the VBUS_VALID signal.
3. The device must detect SE0 for at least 2 ms to start SRP when V
BUS
power is off.
4. To initiate SRP, the device turns on its data line pull-up resistor for 5 to 10 ms. The
OTG_HS controller detects data-line pulsing.
5. The device drives V
BUS
above the A-device session valid (2.0 V minimum) for V
BUS
pulsing.
The OTG_HS controller interrupts the application on detecting SRP. The Session
request detected bit is set in Global interrupt status register (SRQINT set in
OTG_HS_GINTSTS).
6. The application must service the Session request detected interrupt and turn on the
port power bit by writing the port power bit in the host port control and status register.
The PHY indicates port power-on by asserting the VBUS_VALID signal.
7. When the USB is powered, the device connects, completing the SRP process.
B-device session request protocol
The application must set the SRP-capable bit in the Core USB configuration register. This
enables the OTG_HS controller to initiate SRP as a B-device. SRP is a means by which the
OTG_HS controller can request a new session from the host.
Figure 429. B-device SRP
1. VBUS_VALID = V
BUS
valid signal from PHY
B_VALID = B-device valid session to PHY
DISCHRG_VBUS = discharge signal to PHY
SESS_END = session end signal to PHY
CHRG_VBUS = charge V
BUS
signal to PHY
DP = Data plus line
DM = Data minus line
ai1568b2
VBUS_VALID
B_VALID
DISCHRG_VBUS
SESS_END
OTG_HS_FS_DP
OTG_HS_FS_DM
CHRG_VBUS
Suspend
Data line pulsing Connect
V
BUS
pulsing
1
6
2
3
4
5 8
7
Low
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