EasyManuals Logo

STMicroelectronics STM32F407 User Manual

STMicroelectronics STM32F407
1731 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #657 background imageLoading...
Page #657 background image
DocID018909 Rev 11 657/1731
RM0090 General-purpose timers (TIM9 to TIM14)
687
Figure 199. Example of one pulse mode.
For example you may want to generate a positive pulse on OC1 with a length of t
PULSE
and
after a delay of t
DELAY
as soon as a positive edge is detected on the TI2 input pin.
Use TI2FP2 as trigger 1:
1. Map TI2FP2 to TI2 by writing CC2S=’01’ in the TIMx_CCMR1 register.
2. TI2FP2 must detect a rising edge, write CC2P=’0’ and CC2NP = ‘0’ in the TIMx_CCER
register.
3. Configure TI2FP2 as trigger for the slave mode controller (TRGI) by writing TS=’110’ in
the TIMx_SMCR register.
4. TI2FP2 is used to start the counter by writing SMS to ‘110’ in the TIMx_SMCR register
(trigger mode).
The OPM waveform is defined by writing the compare registers (taking into account the
clock frequency and the counter prescaler).
The t
DELAY
is defined by the value written in the TIMx_CCR1 register.
The t
PULSE
is defined by the difference between the auto-reload value and the compare
value (TIMx_ARR - TIMx_CCR1).
Let us say you want to build a waveform with a transition from ‘0’ to ‘1’ when a compare
match occurs and a transition from ‘1’ to ‘0’ when the counter reaches the auto-reload
value. To do this you enable PWM mode 2 by writing OC1M=’111’ in the TIMx_CCMR1
register. You can optionally enable the preload registers by writing OC1PE=’1’ in the
TIMx_CCMR1 register and ARPE in the TIMx_CR1 register. In this case you have to
write the compare value in the TIMx_CCR1 register, the auto-reload value in the
TIMx_ARR register, generate an update by setting the UG bit and wait for external
trigger event on TI2. CC1P is written to ‘0’ in this example.
You only want 1 pulse (Single mode), so you write '1 in the OPM bit in the TIMx_CR1
register to stop the counter at the next update event (when the counter rolls over from the
auto-reload value back to 0). When OPM bit in the TIMx_CR1 register is set to '0', so the
Repetitive Mode is selected.
Particular case: OCx fast enable
TI2
OC1REF
Counter
t
0
TIM1_ARR
TIM1_CCR1
OC1
t
DELAY
t
PULSE

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the STMicroelectronics STM32F407 and is the answer not in the manual?

STMicroelectronics STM32F407 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F407
CategoryController
LanguageEnglish

Related product manuals