Digital camera interface (DCMI) RM0090
478/1731 DocID018909 Rev 11
15.8.11 DCMI data register (DCMI_DR)
Address offset: 0x28
Reset value: 0x0000 0x0000
The digital camera Interface packages all the received data in 32-bit format before
requesting a DMA transfer. A 4-word deep FIFO is available to leave enough time for DMA
transfers and avoid DMA overrun conditions.
15.8.12 DCMI register map
Table 87 summarizes the DCMI registers.
313029282726252423222120191817161514131211109876543210
Byte3 Byte2 Byte1 Byte0
rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr
Bits 31:24 Data byte 3
Bits 23:16 Data byte 2
Bits 15:8 Data byte 1
Bits 7:0 Data byte 0
Table 87. DCMI register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
DCMI_CR
Reserved
ENABLE
Reserved
EDM
FCR
C
VSPOL
HSPOL
PCKPOL
ESS
JPEG
CROP
CM
CAPTURE
Reset value 0 000000000000
0x04
DCMI_SR
Reserved
FNE
VSYNC
HSYNC
Reset value 000
0x08
DCMI_RIS
Reserved
LINE_RIS
VSYNC_RIS
ERR_RIS
OVR_RIS
FRAME_RIS
Reset value 00000
0x0C
DCMI_IER
Reserved
LINE_IE
VSYNC_IE
ERR_IE
OVR_IE
FRAME_IE
Reset value 00000
0x10
DCMI_MIS
Reserved
LINE_MIS
VSYNC_MIS
ERR_MIS
OVR_MIS
FRAME_MIS
Reset value 00000
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