STMicroelectronics STM32F407 User Manual

DocID018909 Rev 11 1299/1731
RM0090 USB on-the-go full-speed (OTG_FS)
1368
OTG_FS device V
BUS
discharge time register (OTG_FS_DVBUSDIS)
Address offset: 0x0828
Reset value:
0x0000 17D7
This register specifies the V
BUS
discharge time after V
BUS
pulsing during SRP.
OTG_FS device V
BUS
pulsing time register (OTG_FS_DVBUSPULSE)
Address offset: 0x082C
Reset value: 0x0000 05B8
This register specifies the V
BUS
pulsing time during SRP.
OTG_FS device IN endpoint FIFO empty interrupt mask register:
(OTG_FS_DIEPEMPMSK)
Address offset: 0x834
Reset value: 0x0000 0000
This register is used to control the IN endpoint FIFO empty interrupt generation
(TXFE_OTG_FS_DIEPINTx).
313029282726252423222120191817161514131211109876543210
Reserved
VBUSDT
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 VBUSDT: Device V
BUS
discharge time
Specifies the V
BUS
discharge time after V
BUS
pulsing during SRP. This value equals:
V
BUS
discharge time in PHY clocks / 1 024
Depending on your V
BUS
load, this value may need adjusting.
313029282726252423222120191817161514131211109876543210
Reserved
DVBUSP
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 DVBUSP: Device V
BUS
pulsing time
Specifies the V
BUS
pulsing time during SRP. This value equals:
V
BUS
pulsing time in PHY clocks / 1 024
313029282726252423222120191817161514131211109876543210
Reserved
INEPTXFEM
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English