DocID018909 Rev 11 375/1731
RM0090 Interrupts and events
389
12 19 settable DMA1_Stream1 DMA1 Stream1 global interrupt 0x0000 0070
13 20 settable DMA1_Stream2 DMA1 Stream2 global interrupt 0x0000 0074
14 21 settable DMA1_Stream3 DMA1 Stream3 global interrupt 0x0000 0078
15 22 settable DMA1_Stream4 DMA1 Stream4 global interrupt 0x0000 007C
16 23 settable DMA1_Stream5 DMA1 Stream5 global interrupt 0x0000 0080
17 24 settable DMA1_Stream6 DMA1 Stream6 global interrupt 0x0000 0084
18 25 settable ADC
ADC1, ADC2 and ADC3 global
interrupts
0x0000 0088
19 26 settable CAN1_TX CAN1 TX interrupts 0x0000 008C
20 27 settable CAN1_RX0 CAN1 RX0 interrupts 0x0000 0090
21 28 settable CAN1_RX1 CAN1 RX1 interrupt 0x0000 0094
22 29 settable CAN1_SCE CAN1 SCE interrupt 0x0000 0098
23 30 settable EXTI9_5 EXTI Line[9:5] interrupts 0x0000 009C
24 31 settable TIM1_BRK_TIM9
TIM1 Break interrupt and TIM9 global
interrupt
0x0000 00A0
25 32 settable TIM1_UP_TIM10
TIM1 Update interrupt and TIM10
global interrupt
0x0000 00A4
26 33 settable TIM1_TRG_COM_TIM11
TIM1 Trigger and Commutation
interrupts and TIM11 global interrupt
0x0000 00A8
27 34 settable TIM1_CC TIM1 Capture Compare interrupt 0x0000 00AC
28 35 settable TIM2 TIM2 global interrupt 0x0000 00B0
29 36 settable TIM3 TIM3 global interrupt 0x0000 00B4
30 37 settable TIM4 TIM4 global interrupt 0x0000 00B8
31 38 settable I2C1_EV I
2
C1 event interrupt 0x0000 00BC
32 39 settable I2C1_ER I
2
C1 error interrupt 0x0000 00C0
33 40 settable I2C2_EV I
2
C2 event interrupt 0x0000 00C4
34 41 settable I2C2_ER I
2
C2 error interrupt 0x0000 00C8
35 42 settable SPI1 SPI1 global interrupt 0x0000 00CC
36 43 settable SPI2 SPI2 global interrupt 0x0000 00D0
37 44 settable USART1 USART1 global interrupt 0x0000 00D4
38 45 settable USART2 USART2 global interrupt 0x0000 00D8
39 46 settable USART3 USART3 global interrupt 0x0000 00DC
Table 61. Vector table for STM32F405xx/07xx and STM32F415xx/17xx (continued)
Position
Priority
Type of
priority
Acronym Description Address