Register Operations
6-10
Table 6−2. Register Operations (Continued)
Mnemonic PageDescription
32-Bit ACC Register Operations (Continued)
SUBCU ACC,loc16 Subtract conditional 16-bit value 6-345
SUBCUL ACC,loc32 Subtract conditional 32-bit value 6-347
SUBL ACC,loc32 Subtract 32-bit value 6-350
SUBL loc32,ACC Subtract 32-bit value 6-353
SUBL ACC,P << PM Subtract 32-bit value 6-351
SUBRL loc32,ACC Reverse-subtract specified location from ACC 6-355
SUBUL ACC,loc32 Subtract unsigned 32-bit value 6-357
TEST ACC Test for accumulator equal to zero 6-362
64-Bit ACC:P Register Operations
ASR64 ACC:P,#1..16 Arithmetic shift right of 64-bit value 6-55
ASR64 ACC:P,T Arithmetic shift right of 64-bit value by T(5:0) 6-56
CMP64 ACC:P Compare 64-bit value 6-77
LSL64 ACC:P,1..16 Logical shift left 1 to 16 places 6-137
LSL64 ACC:P,T 64-bit logical shift left by T(5:0) 6-138
LSR64 ACC:P,#1..16 64-bit logical shift right by 1 to 16 places 6-142
LSR64 ACC:P,T 64-bit logical shift right by T(5:0) 6-143
NEG64 ACC:P Negate ACC:P 6-246
SAT64 ACC:P Saturate ACC:P based on OVC value 6-314
P or XT Register Operations (P, PH, PL, XT, T, TL)
ADDUL P,loc32 Add 32-bit unsigned value to P 6-40
MAXCUL P,loc32 Conditionally find the unsigned maximum 6-150
MINCUL P,loc32 Conditionally find the unsigned minimum 6-154
MOV PH,loc16 Load the high half of the P register 6-177
MOV PL,loc16 Load the low half of the P register 6-178
MOV loc16,P Store lower half of shifted P register 6-174
MOV
T,loc16 Load the upper half of the XT register 6-180
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