Texas Instruments TMS320x2833 series User Manual

www.ti.com Interrupt Sources
Table 6-5. PIE Vector Table (continued)
PIE Group
Name VECTOR ID
(1)
Address
(2)
Size (x16) Description
(3)
CPU Priority Priority
USER6 25 0x0000 0D32 2 User Defined Trap - -
USER7 26 0x0000 0D34 2 User Defined Trap - -
USER8 27 0x0000 0D36 2 User Defined Trap - -
USER9 28 0x0000 0D38 2 User Defined Trap - -
USER10 29 0x0000 0D3A 2 User Defined Trap - -
USER11 30 0x0000 0D3C 2 User Defined Trap - -
USER12 31 0x0000 0D3E 2 User Defined Trap - -
PIE Group 1 Vectors - MUXed into CPU INT1
INT1.1 32 0x0000 0D40 2 SEQ1INT (ADC) 5 1 (highest)
INT1.2 33 0x0000 0D42 2 SEQ2INT (ADC) 5 2
INT1.3 34 0x0000 0D44 2 Reserved 5 3
INT1.4 35 0x0000 0D46 2 XINT1 5 4
INT1.5 36 0x0000 0D48 2 XINT2 5 5
INT1.6 37 0x0000 0D4A 2 ADCINT (ADC) 5 6
INT1.7 38 0x0000 0D4C 2 TINT0 (CPU- 5 7
Timer0)
INT1.8 39 0x0000 0D4E 2 WAKEINT (LPM/WD) 5 8 (lowest)
PIE Group 2 Vectors - MUXed into CPU INT2
INT2.1 40 0x0000 0D50 2 EPWM1_TZINT (EPWM1) 6 1 (highest)
INT2.2 41 0x0000 0D52 2 EPWM2_TZINT (EPWM2) 6 2
INT2.3 42 0x0000 0D54 2 EPWM3_TZINT (EPWM3) 6 3
INT2.4 43 0x0000 0D56 2 EPWM4_TZINT (EPWM4) 6 4
INT2.5 44 0x0000 0D58 2 EPWM5_TZINT (EPWM5) 6 5
INT2.6 45 0x0000 0D5A 2 EPWM6_TZINT (EPWM6) 6 6
INT2.7 46 0x0000 0D5C 2 Reserved 6 7
INT2.8 47 0x0000 0D5E 2 6 8 (lowest)
PIE Group 3 Vectors - MUXed into CPU INT3
INT3.1 48 0x0000 0D60 2 EPWM1_INT (EPWM1) 7 1 (highest)
INT3.2 49 0x0000 0D62 2 EPWM2_INT (EPWM2) 7 2
INT3.3 50 0x0000 0D64 2 EPWM3_INT (EPWM3) 7 3
INT3.4 51 0x0000 0D66 2 EPWM4_INT (EPWM4) 7 4
INT3.5 52 0x0000 0D68 2 EPWM5_INT (EPWM5) 7 5
INT3.6 53 0x0000 0D6A 2 EPWM6_INT (EPWM6) 7 6
SPRUFB0C – September 2007 – Revised May 2009 Peripheral Interrupt Expansion (PIE) 135
Submit Documentation Feedback

Texas Instruments TMS320x2833 series Specifications

General

Brand	Texas Instruments
Model	TMS320x2833 series
Category	Controller
Language	English