IT2200 Reader System with Multimode Capability Installation & Maintenance/Service Guide
D-14
C2 LA23 In Unlatched address, bit 23
C3 LA22 In Unlatched address, bit 22
C4 LA21 In Unlatched address, bit 21
C5 LA20 In Unlatched address, bit 20
C6 LA19 In Unlatched address, bit 19
C7 LA18 In Unlatched address, bit 18
C8 LA17 In Unlatched address, bit 17
C9 MRD_L In Memory write
C10 MWT_L In Memory read
C11 D8 In/Out Data bus, bit 8
C12 D9 In/Out Data bus, bit 9
C13 D10 In/Out Data bus, bit 10
C14 D11 In/Out Data bus, bit 11
C15 D12 In/Out Data bus, bit 12
C16 D13 In/Out Data bus, bit 13
C17 D14 In/Out Data bus, bit 14
C18 D15 In/Out Data bus, bit 15
D1 MCS16_L Out Memory chip select 16
D2 IO16_L Out I/O chip select 16
D3 IRQ10 Out Interrupt request 10
D4 IRQ11 Out Interrupt request 11
D5 IRQ12 Out Interrupt request 12
D6 IRQ15 Out Interrupt request 15
D7 IRQ14 Out Interrupt request 14
D8 DAK0_L In DMA acknowledge 0
D9 DRQ0 Out DMA request 0
D10 DAK5_L In DMA acknowledge 5
D11 DRQ5 Out DMA request 5
Table D-9 ISA Bus Pin Definition (continued)
Pin Signal In/Out Description
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