Z8 Microcontrollers
Instruction Descriptions and Formats ZiLOG
12-20 UM001601-0803
CLR
CLEAR
CLR
CLEAR
CLR dst
Instruction Format:
Operation:
dst <— 0
The destination operand is cleared to 00H.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the destination Working
Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For example, if Working
Register R12 (CH) is the destination operand, then ECH will be used as the destination operand in the Op Code.
Example:
If Working Register R6 contains AFH, the statement:
CLR R6
Op Code: B0 E6
will leave the value 00H in Working Register R6.
If Register A5H contains the value 23H, and Register 23H contains the value FCH, the statement:
CLR @A5H
Op Code: B1 A5
will leave the value 00H in Register 23H.
Flags: C: Unaffected
Z: Unaffected
S: Unaffected
V: Unaffected
D: Unaffected
H: Unaffected
To Next Page
Loading...
Need help?
General
