ZiLOG Z8 User Manual

Z8 Microcontrollers
ZiLOG Instruction Descriptions and Formats
UM001601-0803 12-33
INCW
INCREMENT WORD
INCW
Increment Word
INCW dst
Instruction Format:
Operation:
dst <— dst - 1
The contents of the destination (which must be an even address) operand is decremented by one. The destination
operand can be a Register Pair or a Working Register Pair.
Note:
Address modes RR or IR can be used to specify a 4-bit Working Register Pair. In this format, the destination
Working Register Pair operand is specified by adding 1110B (EH) to the high nibble of the operand. For example,
if Working Register Pair R12 (CH) is the destination operand, then ECH will be used as the destination operand in
the Op Code
Example:
If Register Pairs 30H and 31H contain the value 0AF2H, the statement:
INCW 30H
Op Code: A0 30
leaves the value 0AF3H in Register Pair 30H and 31H. The Z, V, and S Flags are cleared.
Example:
If Working Register R0 contains 30H, and Register Pairs 30H and 31H contain the value FAF3H, the statement:
INCW @R0
Op Code: A1 E0
leaves the value FAF4H in Register Pair 30H and 31H. The S Flag is set, and the Z and V Flags are cleared.
OPC
dst
Cycles
OPC
Address Mode
(Hex)
dst
10
10
10
A0
A1
A0
RR
IR
R
Flags: C: Unaffected
Z: Set if the result is zero; cleared otherwise.
S: Set if the result of bit 7 is set (negative); cleared otherwise.
V: Set if arithmetic overflow occurs; cleared otherwise.
D: Unaffected
H: Unaffected

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English