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ZiLOG Z8 - Page 212

ZiLOG Z8
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Z8 Microcontrollers
Instruction Descriptions and Formats ZiLOG
12-72 UM001601-0803
SWAP
SWAP NIBBLES
SWAP
Swap Nibbles
SWAP dst
Instruction Format:
Operation:
dst(7-4) <—> dst(3-0)
The contents of the lower four bits and upper four bits of the destination operand are swapped.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, destination Working
Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For example, if Working
Register R12 (CH) is the destination operand, then ECH will be used as the destination operand in the Op Code.
Example:
If Register BCH contains B3H (10110011B), the statement:
SWAP B3H
Op Code: F0 B3
will leave the value 3BH (00111011B) in Register BCH. The Z and S Flags are cleared.
Example:
If Working Register R5 contains BCH and Register BCH contains B3H (10110011B), the statement:
SWAP @R5H
Op Code: F1 E5
will leave the value 3BH (00111011B) in Register BCH. The Z and S Flags are cleared.
Flags: C: Unaffected
Z: Set if the result is zero; cleared otherwise.
S: Set if the result bit 7 is set; cleared otherwise.
V: Undefined
D: Unaffected
H: Unaffected

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