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Bardac PLX - Page 223

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PIN number tables 223
S 13.6.1.1 DIO 3 (T20) SETUP / DIO 3 Output mode enable PIN 28 3 0 - 1 Disabled 28 3
13.6.1.2 DIO 3 (T20) SETUP / DIO 3 Output value rectify enable PIN 284 0 - 1 Enabled 284
13.6.1.3 DIO 3 (T20) SETUP / DIO 3 OP comparator threshold PIN 285 + /-300.00% 0.00% 285
13.6.1.4 DIO 3 (T20) SETUP / DIO 3 Output inversion mode PIN 28 6 0 - 1 Non invert 286
13.6.1.7 DIO 3 (T20) SETUP / DIO 3 Input high value PIN 2 87 + /-300.00 % 0.01 % 287
13.6.1.8 DIO 3 (T20) SETUP / DIO 3 Input lo w value PIN 288 + /-300.00% 0.00% 288
S 13.6.1.1 DIO 4 (T21) SETUP / DIO 4 Output mode enable PIN 28 9 0 - 1 Disabled 28 9
13.6.1.2 DIO 4 (T21) SETUP / DIO 4 Output value rectify enable PIN 290 0 - 1 Enabled 290
13.6.1.3 DIO 4 (T21) SETUP / DIO 4 OP comparator threshold PIN 291 + /-300.0 0 % 0.0 0 % 291
13.6.1.4 DIO 4 (T21) SETUP / DIO 4 Output inversion mode PIN 29 2 0 - 1 Non invert 292
13.6.1.7 DIO 4 (T21) SETUP / DIO 4 Input high value PIN 2 93 + /-300.00 % 0.01 % 293
13.6.1.8 DIO 4 (T21) SETUP / DIO 4 Input lo w value PIN 294 + /-300.00% 0.00% 294
0 295
13.8.2 STA GING POSTS / Digital post 1 PIN 296 0 - 1 Lo w 296
13.8.2 STA GING POSTS / Digital post 2 PIN 297 0 - 1 Lo w 297
13.8.2 STA GING POSTS / Digital post 3 PIN 298 0 - 1 Lo w 298
13.8.2 STA GING POSTS / Digital post 4 PIN 299 0 - 1 Lo w 299
13.8.2 STA GING POSTS / Analog post 1 PIN 300 + /-300.0 0 % 0.00 % 300
13.8.2 STA GING POSTS / Analog post 2 PIN 301 + /-300.0 0 % 0.00 % 301
13.8.2 STA GING POSTS / Analog post 3 PIN 302 + /-300.0 0 % 0.00 % 302
13.8.2 STA GING POSTS / Analog post 4 PIN 303 + /-300.0 0 % 0.00 % 303
0 304
13.9.1 SOFT W ARE TERMIN ALS / Anded run PIN 305 0 - 1 High 305
13.9.2 SOFT W ARE TERMIN ALS / Anded jog PIN 306 0 - 1 High 30 6
13.9.3 SOFT W ARE TERMIN ALS / Anded start PIN 307 0 - 1 High 307
13.9.4 SOFT W ARE TERMIN ALS / Internal run PIN 30 8 0 - 1 Low 308
0 309
13.5.2.1 DIP1 (T14) SETUP / DIP1 Input high value PIN 3 10 + /-300.00% 0.01% 310
13.5.2.2 DIP1 (T14) SETUP / DIP1 Input low value PIN 311 + /-300.00% 0.00 % 3 11
13.5.2.1 DIP2 (T15) SETUP / DIP2 Input high value PIN 3 12 + /-300.00 % 0.0 1 % 3 12
13.5.2.2 DIP2 (T15) SETUP / DIP2 Input low value PIN 313 + /-300.00% 0.00 % 3 13
13.5.2.1 DIP3 (T16) SETUP / DIP3 Input high value PIN 3 14 + /-300.00 % 0.0 1 % 3 14
13.5.2.2 DIP3 (T16) SETUP / DIP3 Input low value PIN 315 + /-300.00% 0.00 % 3 15
13.5.2.1 DIP4 (T17) SETUP / DIP4 Input high value PIN 3 16 + /-300.00 % 0.0 1 % 3 16
13.5.2.2 DIP4 (T17) SETUP / DIP4 Input low value PIN 317 + /-300.00% 0.00 % 3 17
13.5.3.1 RUN INPUT SETUP / RUN input HI value PIN 31 8 + /-300.00% 0.01% 318
13.5.3.2 RUN INPUT SETUP / RUN input LO value PIN 319 + /-300.0 0 % 0.00 % 319
13.3.1.1 UIP2 (T2) SETUP / UIP2 Input range PIN 320 1 of 4 ranges 10 V range 320
13.3.1.2 UIP2 (T2) SETUP / UIP2 Input offset PIN 321 + /-100.00% 0.00 % 3 21
13.3.1.3 UIP2 (T2) SETUP / UIP2 Linear scaling factor PIN 32 2 + /-3.00 00 1.00 00 322
13.3.1.4 UIP2 (T2) SETUP / UIP2 Max clamp level PIN 32 3 + /-300.0 0 % 100.00% 323
13.3.1.5 UIP2 (T2) SETUP / UIP2 Min clamp level PIN 3 24 + /-300.00% -100.00% 324
13.3.1.9 UIP2 (T2) SETUP / UIP2 Digital IP, high value for output 1 PIN 325 + /-300.00% 0.01% 325
13.3.1.1 0 UIP2 (T2) SETUP / UIP2 Digital IP, lo w value for output 1 PIN 32 6 + /-300.0 0 % 0.0 0 % 326
13.3.1.1 1 UIP2 (T2) SETUP / UIP2 Digital IP, high value for output 2 PIN 327 + /-300.00% 0.01% 327
13.3.1.1 2 UIP2 (T2) SETUP / UIP2 Digital IP, lo w value for output 2 PIN 32 8 + /-300.0 0 % 0.0 0 % 328
13.3.1.1 3 UIP2 (T2) SETUP / UIP2 Threshold PIN 329 + /-30.000 V 6.00 0 V 329
13.3.1.1 UIP3 (T3) SETUP / UIP3 Input range PIN 330 1 of 4 ranges 10V range) 330
13.3.1.2 UIP3 (T3) SETUP / UIP3 Input offset PIN 331 + /-100.00% 0.00 % 3 31
13.3.1.3 UIP3 (T3) SETUP / UIP3 Linear scaling factor PIN 33 2 + /-3.00 00 1.00 00 332
13.3.1.4 UIP3 (T3) SETUP / UIP3 Max clamp level PIN 33 3 + /-300.0 0 % 100.00% 333
13.3.1.5 UIP3 (T3) SETUP / UIP3 Min clamp level PIN 3 34 + /-300.00% -100.00% 334
13.3.1.9 UIP3 (T3) SETUP / UIP3 Digital IP, high value for output 1 PIN 335 + /-300.00% 0.01% 335
13.3.1.1 0 UIP3 (T3) SETUP / UIP3 Digital IP, lo w value for output 1 PIN 33 6 + /-300.0 0 % 0.0 0 % 336
13.3.1.1 1 UIP3 (T3) SETUP / UIP3 Digital IP, high value for output 2 PIN 337 + /-300.00% 0.01% 337
13.3.1.1 2 UIP3 (T3) SETUP / UIP3 Digital IP, lo w value for output 2 PIN 33 8 + /-300.0 0 % 0.0 0 % 338
13.3.1.1 3 UIP3 (T3) SETUP / UIP3 Threshold PIN 339 + /-30.000 V 6.00 0 V 339
13.3.1.1 UIP4 (T4) SETUP / UIP4 Input range PIN 340 1 of 4 ranges 10 V range 340
13.3.1.2 UIP4 (T4) SETUP / UIP4 Input offset PIN 341 + /-100.00% 0.00 % 3 41
13.3.1.3 UIP4 (T4) SETUP / UIP4 Linear scaling factor PIN 34 2 + /-3.00 00 1.00 00 342
13.3.1.4 UIP4 (T4) SETUP / UIP4 Max clamp level PIN 34 3 + /-300.0 0 % 100.00% 343
13.3.1.5 UIP4 (T4) SETUP / UIP4 Min clamp level PIN 3 44 + /-300.00% -100.00% 344
13.3.1.9 UIP4 (T4) SETUP / UIP4 Digital IP, high value for output 1 PIN 345 + /-300.00% 0.01% 345
13.3.1.1 0 UIP4 (T4) SETUP / UIP4 Digital IP, lo w value for output 1 PIN 34 6 + /-300.0 0 % 0.0 0 % 346
13.3.1.1 1 UIP4 (T4) SETUP / UIP4 Digital IP, high value for output 2 PIN 347 + /-300.00% 0.01% 347
13.3.1.1 2 UIP4 (T4) SETUP / UIP4 Digital IP, lo w value for output 2 PIN 34 8 + /-300.0 0 % 0.0 0 % 348
13.3.1.1 3 UIP4 (T4) SETUP / UIP4 Threshold PIN 349 + /-30.000 V 6.00 0 V 349

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