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Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Software Configuration Guide
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Chapter 9 Overview of the Ethernet SPAs
Restrictions
The 2-Port Gigabit Synchronous Ethernet SPA has a dedicated external interface known as the BITS
interface to recover the clock from a SSU. The Cisco ASR 1000 Series Routers use this clock for SyncE.
The BITS interface supports E1 (European SSUs) and T1 (American BITS) framing.
Table 9-1 lists the
framing modes for the BITS interface on a 2-Port Gigabit Synchronous Ethernet SPA.
Ta b l e 9-1 Framing Modes for BITS Interface
You can implement SyncE on the 2-Port Gigabit Synchronous Ethernet SPA, with four different
configurations:
• Clock Recovery from SyncE: The system clock is recovered from the SyncE clocking source
(Gigabit and Tengigabit interfaces only). The router uses this clock as the Tx clock for other SyncE
interfaces or ATM or CEoP interfaces.
• Clock Recovery from External Interface: The system clock is recovered from a BITS clocking
source or a GPS interface.
• Line to External: The system clock received from an Ethernet is forwarded to an external
Synchronization Supply Unit (SSU). During a synchronization chain, the received clock may have
unacceptable wander and jitter. The router recovers the clock from the SyncE interface, converts it
to the format required for the BITS interface, and sends it to an SSU through the BITS port. The
SSU cleans the clock and sends it back to the BITS interface. This clock is used as the Tx clock for
the SyncE ports.
• System to External: The system clock is used as the Tx clock for an external interface. By default,
the system clock is not transmitted on an external interface.
Squelching
Squelching is a process in which, an alarm indication signal (AIS) is sent to the Tx interfaces whenever
the clock source goes down. The squelching functionality is implemented in two scenarios:
• Line to external: If the line source goes down, an AIS is transmitted on the external interface to the
SSU.
• System to external: If the router loses all the clock sources, an AIS is transmitted on the external
interface to the SSU.
Squelching is performed only on an external device such as an SSU or a Primary Reference Clock (PRC).
BITS or SSU Interface Support
Matrix
Framing Modes ï€
Supported SSM or QL support Tx Port Rx Port
T1 T1 ESF Yes Yes Yes
T1 T1 SF No Yes Yes
E1 E1 CRC4 Ye s Yes Yes
E1 E1 FAS No Yes Yes
E1 E1 CAS No No Yes
E1 E1 CAS CRC4 Yes No Yes
2048kHz 2048kHz No Yes Yes