IMBA-8650 Motherboard
Page 14
Figure 2-5: Intel® 865G Northbridge
The GMCH on the Intel® 865G is interfaced to the Intel
®
I/O Controller Hub 5 (ICH5)
through a Hub Interface (HI) chip-to-chip connection. Some of the features of the Intel®
865G are listed below.
Host Interface Support
o Intel® Pentium® 4 processors with 512-KB L2 cache on 0.13 micron
process / Pentium 4 processor on 90 nm process
o 64-bit FSB frequencies of 400 MHz (100 MHz bus clock), 533 MHz (133
MHz bus clock), and 800 MHz (200 MHz bus clock). Maximum theoretical
BW of 6.4 GB/s.
o FSB Dynamic Bus Inversion on the data bus
o 32-bit addressing for access to 4 GB of memory space
o Hyper-Threading Technology
System Memory Controller Support
o Dual-channel (128 bits wide) DDR memory interface
o Single-channel (64 bits wide) DDR operation supported
o Symmetric and asymmetric memory dual-channel upgrade supported
o 128-Mb, 256-Mb, 512-Mb technologies implemented as x8, x16 devices
o Up to 4 GB system memory
o Supports up to 16 simultaneously-open pages (four per row) in
dual-channel mode and up to 32 open pages in single-channel mode
o DDR (Double Data Rate type 1) Support
• Supports maximum of two DDR DIMMs per channel, single-sided
and/or double-sided
• Supports DDR266, DDR333, DDR400 DIMM modules