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Intel 740 User Manual
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Intel74
0(TM) Graphics Accelerator Reference Card
2.1
SO-DIMM Connector
B
12
16
Thursday, April 09, 1998
Title
Siz
e
Document Number
Rev
Date:
Sheet
of
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD46
MD45
MD44
MD43
MD41
MD40
MD39
MD38
MD37
MD42
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA1
1
MA1
0
MA
9
MA
8
MA
7
MA
6
MA
5
MA
4
MA
3
MA
2
MA
1
MA
0
DQM
7
DQM
6
DQM
5
DQM
4
DQM
3
DQM
2
DQM
1
DQM
0
TP_
1158
TP_
1159
TP_
1160
TP_
1161
TP_
1149
TP_
1150
TP_
1151
TP_
1152
TP_
1153
TP_
1154
TP_
1177
TP_
1178
MD20
MD47
VCC3
VCC3
SO-DIMM CONN.
J4
SODIMM CONNECTOR
NC
145
GND
119
NC
146
GND
120
NC
147
GND
139
NC
148
GND
140
GND
37
GND
38
GND
55
GND
56
GND
71
GND
72
GND
85
GND
86
GND
103
GND
104
GND
1
VCC3
93
GND
2
VCC3
11
GND
21
VCC3
94
GND
22
VCC3
12
VCC3
113
VCC3
27
VCC3
114
VCC3
28
VCC3
129
VCC3
47
VCC3
130
VCC3
48
VCC3
143
VCC3
63
VCC3
144
VCC3
64
VCC3
75
VCC3
76
RSVD
77
DQMB
0
118
RSVD
78
DQMB
1
117
DQMB
2
116
DQMB
3
115
DQMB
4
26
DQMB
5
25
DQMB
6
24
DQMB
7
23
A0
92
A1
91
A2
90
A3
89
A4
88
A5
87
A6
84
A7
83
A8
82
A9
81
RSVD(A10
)
80
RSVD(A11
)
79
DQ0
138
DQ1
137
DQ2
136
DQ3
135
DQ4
134
DQ5
133
DQ6
132
DQ7
131
DQ8
128
DQ9
127
DQ10
126
DQ11
125
DQ12
124
DQ13
123
DQ14
122
DQ15
121
DQ16
112
DQ17
111
DQ18
110
DQ19
109
DQ20
108
DQ21
107
DQ22
106
DQ23
105
DQ24
102
DQ25
101
DQ26
100
DQ27
99
DQ28
98
DQ29
97
DQ30
96
DQ31
95
DQ32
46
DQ33
45
DQ34
44
DQ35
43
DQ36
42
DQ37
41
DQ38
40
DQ39
39
DQ40
36
DQ41
35
DQ42
34
DQ43
33
DQ44
32
DQ45
31
DQ46
30
DQ47
29
DQ48
20
DQ49
19
DQ50
18
DQ51
17
DQ52
16
DQ53
15
DQ54
14
DQ55
13
DQ56
10
DQ57
9
DQ58
8
DQ59
7
DQ60
6
DQ61
5
DQ62
4
DQ63
3
RAS*
67
CAS*
68
WE*
69
CS1
65
CS0
66
CLK1
73
CLK0
74
CKE
70
DSF
57
SDA
141
SCL
142
RFU
58
RFU
59
RFU
60
RFU
61
SB
A
62
RSVD
49
RSVD
50
RSVD
51
RSVD
52
RSVD
53
RSVD
54
MD[63:0]
4,13
MA[11:0]
4,13
DQM[7:0]
4,13
CKE
4,13
SRASA
#
4
SCASA
#
4
WEA
#
4
CSB0
#
4
CSA1
#
4
TCL
K1
4
3VS
DA
4,6,7,8,11
3VS
CL
4,6,7,8,11
TCL
K0
4
51
53
Table of Contents
Table of Contents
3
Revision History
8
Introduction
9
About this Design Guide
11
References
12
Addin Card Design
15
Introduction
15
Design Features
16
Intel740™ Graphics Accelerator
16
MIX and Match Options for Intel740™ Graphics Accelerator Card
16
BT829B - Video Decoder
17
BT869 - TV Encoder
17
Terminology
17
Power Sources
17
Intel740™ Graphics Accelerator Power Supplies
17
Fences
18
Stitching
18
Example of Power Plane Separation ("Fencing")
18
Example of Power Plane Stitching
18
Major Signal Sections
19
Board Description
20
Layout and Routing Guidelines
19
Placement
19
Example ATX Layout
20
Four Layer Board Stack-Up
21
BGA Component
22
Layout Requirements
22
Metal Defined Land Dimensions
22
BGA Trace
22
Ground Connections
23
Power Connections
23
Dogbone Via Pattern
23
Decoupling
24
Suggested VCC Planes for the Intel740™ Graphics Accelerator
24
Intel740™ Graphics Accelerator Decoupling
24
General Signal Routing
25
Voltage Regulator
25
Bt829 Video Decoder
25
Intel740™ Graphics Accelerator BGA Routing Example
25
Ground Planes
26
Power Planes
26
Passive Components and Signal Routing
26
Bt869 Video Encoder
26
Bt829B GND and AGND Pins
26
Bt829B VCC and AVCC Pins
26
Power Planes
27
Passive Components and Signal Routing
27
AGP Layout and Routing Guidelines
27
Bt869 Digital and Analog Power Pins
27
AGP Signal Lengths
27
Strobes and Corresponding Signal Groups
27
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
28
Supported Memory Options
28
Memory Layout Restrictions (See Figure 2-12 and Figure 2-13)
28
Memory Layout Restrictions (See Figure 2-14 and Figure 2-15)
29
Layout Dimensions (MA[11:0])
29
Layout Dimensions (MD[63:0], DQM[7:0])
29
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA1#, CSB0#)
29
Memory Layout Restrictions (See Figure 2-16 and Figure 2-17)
30
Intel740™ Graphics Accelerator Memory Configurations
31
Layout Dimensions (WEB#, SRASB#, SCASB#, CSA0#)
30
Memory Layout Dimensions (TCLK0)
30
Memory Layout Dimensions (TCLK1)
30
Memory Layout Dimensions (RCLK and OCLK to RCLK)
31
MB Local Memory Connection (64-Bit Data Path)
31
TV out Interface
34
Analog Signals
34
UL and FCC Considerations
34
TV Out/Roma Trace Lengths (See Figure 2-22)
34
Layout Dimensions, Digital TV Bus
34
GPIO Functions
35
Addin Card Schematics
35
512Kx32 and 256Kx32 Pinout Compatibility
38
Device AGP Motherboard Design
59
Introduction
59
Overview
59
About this Chapter
60
Block Diagram
60
Implementation Issues
61
Disabling a Master Device
61
Low Power Logic Implementation
62
State of Signals to be Driven after System Reset but at Least One Clock Prior to Asserting TEST
62
GPO27# and GPO28# Signal Duration
63
The Schematic Diagram for GPO27#, PCIRST# (System Reset), RESET#, ROMA16 Signals
62
Signal Duration of the GPO Signals from PIIX4
63
State Diagrams
64
The Schematic Diagram for the WEB#, SCASB#, SRASB#, CS0B#, CS1B# and TEST
63
Intel740™ Graphics Controller (on Board Device) Remains in Low Power Mode
64
Intel740™ Graphics Controller (on Board Device) State Diagram
64
Signal Quality and Timing Issues
65
Strobe Edge Quality Issues
65
Clock Issues
66
Point-To-Point Topology
66
Design Recommendations
67
General Design Recommendation
67
Voltage Definitions
67
Device AGP Motherboard Layout and Routing Guidelines
67
BGA Quadrant Assignment
68
Major Signal Sections
68
Example ATX Placement for a up Pentium
69
Intel ® 440BX Agpset / Intel 740 Graphics Accelerator Design
69
Board Description
70
3-Point AGP Design Guidelines
70
Layout and Routing
70
Four Layer Board Stack-Up
70
Data and Strobe Definitions
71
Data and Associated Strobe
71
Assumptions for Board Design Guidelines
72
Add-In Card Guideline Assumptions
72
Motherboard Guideline Assumptions
72
Data Signal and Strobe Guideline Assumptions
72
Control and Clock Signal Guideline Assumptions
72
Data Signal and Strobe Requirements
72
Control Signal Line Length Requirements
73
3-Load AGP Topology
74
Overall Solution Space
74
Point-To-Point Topology
73
Strobe and Data Segment Solution Space
74
Device Data Load Topology
74
Device Strobe Load Topology
74
Device Data Load Topology (Solution 1 Is Shown)
75
Device Strobe Load Topology (Solution 1 Is Shown)
75
Clock Topology and Matching
75
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
76
Clock Segment Solution Space
76
Supported Memory Options
76
Memory Layout Restrictions (See Figure 3-16 and Figure 3-17)
77
Memory Layout Restrictions (See Table 3-16 and Table 3-17)
77
Layout Dimensions (MA[11:0])
77
Layout Dimensions (MD[63:0], DQM[7:0])
77
Memory Layout Restrictions (See Figure 3-19)
78
Device AGP Intel740™ Graphics Accelerator Memory Configurations
79
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA0#)
78
Memory Layout Dimensions (TCLK1)
78
Memory Layout Dimensions (RCLK and OCLK to RCLK)
79
Pentium
80
Device AGP Motherboard Reference Design Schematics
80
512Kx32 and 256Kx32 Pinout Compatibility
84
DIMM Socket
95
Usb Connectors
106
Thermal Considerations
128
Thermal Design Considerations Chart
130
Mechanical Information
132
Mounting Hole Locations (Fan/Heatsink Assembly)
134
Board Dimensions
134
Fan/Heatsink Hole Pattern
134
DVD Daughter Card Dimensions (ATX and NLX)-Top Side
135
VMI Header Placement
135
Pin Video Connector Schematic
136
Pin Video Connector
136
Recommended Bracket Placement
137
Recommended Bracket Cutout
137
Bracket
137
NLX Considerations
138
Third Party Vendors
140
Voltage Regulator
142
50 Pin Connector
142
Fan/Heatsink
142
Flash Components
142
Video Encoders/Decoders
142
DVD Daughter Cards
143
TV Tuner
143
Application Note 653: Thermal Design Considerations
146
Table of Contents
147
Document Goals
149
Importance of Thermal Management
149
Introduction
149
Intel740™ Graphics Accelerator Packaging Terminology
150
Case Temperature
151
Thermal Specifications
151
Power
152
Airflow Management
153
Designing for Thermal Performance
153
Cooling Solutions
155
System Fans
155
Fan Placement
155
Fan Direction
157
Size and Quantity
157
Fan Venting
157
Vent Placement
157
Vent Area/Size
157
Vent Shape
158
Ducting
158
Ducting Placement
158
Thermal Enhancements
158
Clearance
158
Low Profile Fan Heat Sink
159
Low Profile Fan Heat Sink PCB Layout Guidelines
159
Low Profile Fan Heat Sink Electrical Requirements
160
Low Profile Fan Heat Sink Attach
161
Low Profile Fan Heat Sink Reliability
161
Low Profile Passive Heat Sink
162
Clip Attach
162
Epoxy
162
Tape Attach
163
Reliability
165
Thermal Interface Management for Heat Sink Solutions
165
Bond Line Management
166
Interface Material Performance
166
Case Temperature Measurements
167
Measurements for Thermal Specifications
167
Power Simulation Software
168
Conclusion
170
Attach Sales Locations
171
Low Profile Fan Heat Sink Sales Locations
171
Low Profile Passive Heat Sink Sales Locations
171
Sources
171
Table of Contents
177
Contents
179
Introduction
179
Low Power Mode Overview
179
State Diagrams
180
Supported Single Monitor and Mulitmonitor Configurations
182
Figures
182
Software Sequence
182
Low Power Mode
182
Tables
182
Monitor and Mulitmonitor Configurations
182
Table of Contents
189
1 Introduction
191
Convention Used
191
Objective
191
Scope of this Document
191
2 Pinout
192
Pin Functional Descriptions (Simplified)
194
3 Control Registers
195
Mode Register and Modes Required to be Supported
195
Special Mode Register
195
Color Register
196
4 Command Truth Table
197
5 Operative Command Table
198
6 Row/Column Addressing Per Memory Size/# Banks
203
7 Functional Description
204
Initialization Sequence
204
Power up Sequence
204
NOP and Device Deselect
205
Precharge All
205
Precharge Selected Bank
205
Read Bank
205
Row Activate
205
Write Bank
205
Block Write
206
Mode Register Set
206
Power down Mode
207
8 Essential Functionality for the "PC SGRAM" Device
208
Burst Read and Burst Write
208
Multi- Bank Ping Pong Access
208
Precharge Command after a Burst Read
208
Read and Write with Autoprecharge
208
Precharge Command after a Burst Write
209
Precharge Termination of a Burst Read
209
Precharge Termination of a Burst Write
209
Read Terminated by Read
209
Read Terminated by Write
209
Write Terminated by Read
209
Write Terminated by Write
209
Auto Refresh (CBR) Command
210
Back to Back Command Support
210
9 SGRAM AC/DC Parameters
211
DC Specifications for 100-166 Mhz
211
Specifications for 100-166 Mhz
211
A.C. Timing Parameters for 100-166 Mhz
212
A.C. Specifications for 166-250 Mhz
213
A.C. Timing Parameters for 166-250 Mhz
213
DC Specifications for 166-250 Mhz
213
IBIS: I/V Characteristics for Input and Output Buffers
214
IBIS Reference
215
Table of Contents
219
General Features
221
Labeling
221
Unbuffered Graphics SO-DIMM Module
221
Mechanical Outline
222
Environmental Requirements
223
Pin Assignments
224
Graphics SO-DIMM Block Diagram
225
Address Translation
229
Configuration
229
Default Parameters
229
Clock Frequency and Memory Timing
231
Resistor Strapping Options
231
Serial Presence Detect EEPROM
231
15 Ns Timing
232
Electrical Characteristics
232
10 Ns Timing
233
Timing Diagrams
234
PCB Layout Considerations
236
Clock Routing and Chip Selects
237
Address/Control Routing
238
Data Routing
239
Electrical Specifications
241
Operating Requirements
241
Sdram/Sgram Components D.C. Operating Requirements
241
Memory Timing
242
5
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Intel 740 Specifications
General
Brand
Intel
Model
740
Category
Video Card
Language
English
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