Intel740™ Graphics Accelerator Design Guide
3-23
3 Device AGP MotherBoard Design
82443BX Component (PCI and AGP Interfaces) P-7
This page shows the 82443BX component, PCI and AGP Interfaces. The definition of pin AF3 has
been changed from SUSCLK to BX-PWROK. Like PIIX4E PWROK, it is connected to the
PWROK logic from the Power Connector page (P-26). Note the GCLKIN and GCLKOUT trace
length requirements on the AGP interface.
82443BX Component (Memory and System Data Bus Interfaces) P-8
This page shows the 82443BX component, Memory and System Data Bus Interfaces. GTL_REF
signal are also shown on this page. Ideally, the GTL_REF signals should be decoupled separately,
and as close as possible to the 82443BX component, but this is not a requirement.
DIMM Connectors 0, 1, 2 P- 9-11
These three pages show the DRAM interface connections from the 82443BX to the DRAM array.
The serial presence detect pins are addressed as 1010-000,001,010 respectively. The 82443BX
strap pull-up/pull-downs will be located on selected MAB# lines. REGE (pin 147) on each DIMM
socket should be pulled high to enable registered DIMMs,
PIIX4E Component P-12
This page shows the PIIX4E component. The PIIX4E component connects to the PCI bus, dual
IDE connectors, and the ISA bus. This reference design supports a subset of the power
management features of the PIIX4E.
PIIX4E Component P-13
This page shows the PIIX4E component Interrupts, USB, DMA, power management, X-Bus, and
GPIO interfaces. Also shown is the CLOCKRUN# pull-down and the external logic needed to
handle a power loss condition.
Ultra I/O Component P-14
This page shows the Ultra I/O component. The RTC may optionally be used. An Infra Red Header
Port is also optional.
AGP Connector P-15
This page shows the AGP connector. In this design, AGP INTA and INTB are connected to the
PCI INTA and INTB through a buffer/driver. The interrupt signals are open-collector, and pulled
up to V
CC3.3.
PCI Connectors P-16/17
These pages show the PCI connectors. In this design, three PCI connectors are used. AD[26, 27,
29, 31] are the preferred lines for the PCI slot IDSELs.
ISA Connectors P-18
This page shows the ISA connectors.
PCI IDE Connectors P-19
This page shows the IDE Connectors. No special logic is required to support Ultra DMA/33 hard
drives.
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