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Intel 740 User Manual
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Slave address = 1010001b
**NOTE ON ALL DIMM SOCKE
TS**
Pin 147 should
be pulled to a high state
to accom
modate registered DIMMs.
DIMM SOCKET
1
3 DEVICE AGP
1.0
DIMM SOCKET 1
INTEL CORPORATION
GRAPHICS COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-79
FOLSOM, CA 95630
Custom
10
4
1
22:16:57
Title
Size
Document Number
Rev
Date:
Sheet
of
MAA13
MD60
MD55
MD36
MD32
MD20
MD1
MD0
DCLK4
DQMA7
MAA4
MD46
MD61
MD15
MD12
MD26
MD2
DCLK6
DCLK7
MECC7
MD17
DCLK5
MD43
MD56
MD31
MD11
MD9
MAA11
MD40
MD27
MD8
MD22
MAA12
MECC4
MAA7
MD63
CS_A#2
DQMA0
MAA10
MAA1
MD62
MD39
MD24
MD23
MD21
DQMA1
MD47
MD57
MD53
MD52
MD34
MD49
MD48
MD29
MD7
R_SA0
MECC6
MAA8
MAA3
MD42
MD41
MD37
MD35
MD6
CKE3
DQMA2
MAA5
MD45
MD58
MD50
MD10
MECC5
MAA9
MD59
MD38
MD18
CS_B#2
CS_B#3
MD51
MD33
MD14
MD19
MECC0
MD28
MD4
MECC2
DQMA6
DQMA3
MD5
DQMA5
DQMA4
MAA6
MAA2
MAA0
MD13
MD3
MECC3
MD16
CS_A#3
CKE2
MECC1
MD44
MD54
MD30
MD25
VCC3
VCC3
VCC3
VCC3
U22
DIMM REF
6
26
40
2
3
4
5
7
8
9
10
11
22
24
25
105
106
108
109
28
29
46
47
41
90
102
124
1
12
18
23
32
85
96
107
116
110
27
111
30
114
115
31
48
42
125
79
163
80
164
81
61
63
147
50
51
52
53
112
113
130
131
45
129
128
132
44
43
54
64
68
78
127
138
148
152
162
62
146
49
59
73
84
143
157
168
133
33
117
34
118
35
119
36
120
37
121
38
122
39
123
13
14
15
16
17
19
20
86
87
88
89
91
92
93
94
95
97
98
99
100
101
103
104
55
56
57
58
60
65
66
67
69
70
71
72
74
75
76
77
139
140
141
142
144
149
150
151
153
154
155
156
158
159
160
161
126
21
134
135
136
137
165
166
167
82
83
145
VCC
VCC
VCC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
CB1
NC
NC
CB4
CB5
NC
NC
DQMB0
DQMB1
DQMB2
DQMB3
VCC
VCC
VCC
VCC
VSS
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VCC
/WE0
/CAS
/S0
/S1
/RAS
NC
NC
CK0
CK1
CK2
CK3
NC
NC
NC
NC
CKE1
REGE
NC
NC
CB2
CB3
DQMB4
DQMB5
DQMB6
DQMB7
/S2
/S3
CKE0
A13
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10 (AP)
BA0
BA1
A11
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
A12
CB0
NC
NC
CB6
CB7
SA0
SA1
SA2
SDA
SCL
NC
R132
4.7K
R103
0 ohm
SRAS_A
#
6,9
MECC[7:0
]
8,9,11
MAA[13:0
]
6,9
SCAS_A
#
6,9
SMBDAT
A
3,6,9,11,13,28,33
CS_B#[3:2
]
6
SMBCL
K
3,6,9,11,13,28,33
MD[63:0
]
8,9,11
CKE[3:2
]
6
WE_A
#
6,9
CS_A#[3:2
]
6
DCLK[11:0
]
6,9,11
DQMA[7:0
]
6,9,11
95
97
Table of Contents
Table of Contents
3
Revision History
8
Introduction
9
About this Design Guide
11
References
12
Addin Card Design
15
Introduction
15
Design Features
16
Intel740™ Graphics Accelerator
16
MIX and Match Options for Intel740™ Graphics Accelerator Card
16
BT829B - Video Decoder
17
BT869 - TV Encoder
17
Terminology
17
Power Sources
17
Intel740™ Graphics Accelerator Power Supplies
17
Fences
18
Stitching
18
Example of Power Plane Separation ("Fencing")
18
Example of Power Plane Stitching
18
Major Signal Sections
19
Board Description
20
Layout and Routing Guidelines
19
Placement
19
Example ATX Layout
20
Four Layer Board Stack-Up
21
BGA Component
22
Layout Requirements
22
Metal Defined Land Dimensions
22
BGA Trace
22
Ground Connections
23
Power Connections
23
Dogbone Via Pattern
23
Decoupling
24
Suggested VCC Planes for the Intel740™ Graphics Accelerator
24
Intel740™ Graphics Accelerator Decoupling
24
General Signal Routing
25
Voltage Regulator
25
Bt829 Video Decoder
25
Intel740™ Graphics Accelerator BGA Routing Example
25
Ground Planes
26
Power Planes
26
Passive Components and Signal Routing
26
Bt869 Video Encoder
26
Bt829B GND and AGND Pins
26
Bt829B VCC and AVCC Pins
26
Power Planes
27
Passive Components and Signal Routing
27
AGP Layout and Routing Guidelines
27
Bt869 Digital and Analog Power Pins
27
AGP Signal Lengths
27
Strobes and Corresponding Signal Groups
27
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
28
Supported Memory Options
28
Memory Layout Restrictions (See Figure 2-12 and Figure 2-13)
28
Memory Layout Restrictions (See Figure 2-14 and Figure 2-15)
29
Layout Dimensions (MA[11:0])
29
Layout Dimensions (MD[63:0], DQM[7:0])
29
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA1#, CSB0#)
29
Memory Layout Restrictions (See Figure 2-16 and Figure 2-17)
30
Intel740™ Graphics Accelerator Memory Configurations
31
Layout Dimensions (WEB#, SRASB#, SCASB#, CSA0#)
30
Memory Layout Dimensions (TCLK0)
30
Memory Layout Dimensions (TCLK1)
30
Memory Layout Dimensions (RCLK and OCLK to RCLK)
31
MB Local Memory Connection (64-Bit Data Path)
31
TV out Interface
34
Analog Signals
34
UL and FCC Considerations
34
TV Out/Roma Trace Lengths (See Figure 2-22)
34
Layout Dimensions, Digital TV Bus
34
GPIO Functions
35
Addin Card Schematics
35
512Kx32 and 256Kx32 Pinout Compatibility
38
Device AGP Motherboard Design
59
Introduction
59
Overview
59
About this Chapter
60
Block Diagram
60
Implementation Issues
61
Disabling a Master Device
61
Low Power Logic Implementation
62
State of Signals to be Driven after System Reset but at Least One Clock Prior to Asserting TEST
62
GPO27# and GPO28# Signal Duration
63
The Schematic Diagram for GPO27#, PCIRST# (System Reset), RESET#, ROMA16 Signals
62
Signal Duration of the GPO Signals from PIIX4
63
State Diagrams
64
The Schematic Diagram for the WEB#, SCASB#, SRASB#, CS0B#, CS1B# and TEST
63
Intel740™ Graphics Controller (on Board Device) Remains in Low Power Mode
64
Intel740™ Graphics Controller (on Board Device) State Diagram
64
Signal Quality and Timing Issues
65
Strobe Edge Quality Issues
65
Clock Issues
66
Point-To-Point Topology
66
Design Recommendations
67
General Design Recommendation
67
Voltage Definitions
67
Device AGP Motherboard Layout and Routing Guidelines
67
BGA Quadrant Assignment
68
Major Signal Sections
68
Example ATX Placement for a up Pentium
69
Intel ® 440BX Agpset / Intel 740 Graphics Accelerator Design
69
Board Description
70
3-Point AGP Design Guidelines
70
Layout and Routing
70
Four Layer Board Stack-Up
70
Data and Strobe Definitions
71
Data and Associated Strobe
71
Assumptions for Board Design Guidelines
72
Add-In Card Guideline Assumptions
72
Motherboard Guideline Assumptions
72
Data Signal and Strobe Guideline Assumptions
72
Control and Clock Signal Guideline Assumptions
72
Data Signal and Strobe Requirements
72
Control Signal Line Length Requirements
73
3-Load AGP Topology
74
Overall Solution Space
74
Point-To-Point Topology
73
Strobe and Data Segment Solution Space
74
Device Data Load Topology
74
Device Strobe Load Topology
74
Device Data Load Topology (Solution 1 Is Shown)
75
Device Strobe Load Topology (Solution 1 Is Shown)
75
Clock Topology and Matching
75
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
76
Clock Segment Solution Space
76
Supported Memory Options
76
Memory Layout Restrictions (See Figure 3-16 and Figure 3-17)
77
Memory Layout Restrictions (See Table 3-16 and Table 3-17)
77
Layout Dimensions (MA[11:0])
77
Layout Dimensions (MD[63:0], DQM[7:0])
77
Memory Layout Restrictions (See Figure 3-19)
78
Device AGP Intel740™ Graphics Accelerator Memory Configurations
79
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA0#)
78
Memory Layout Dimensions (TCLK1)
78
Memory Layout Dimensions (RCLK and OCLK to RCLK)
79
Pentium
80
Device AGP Motherboard Reference Design Schematics
80
512Kx32 and 256Kx32 Pinout Compatibility
84
DIMM Socket
95
Usb Connectors
106
Thermal Considerations
128
Thermal Design Considerations Chart
130
Mechanical Information
132
Mounting Hole Locations (Fan/Heatsink Assembly)
134
Board Dimensions
134
Fan/Heatsink Hole Pattern
134
DVD Daughter Card Dimensions (ATX and NLX)-Top Side
135
VMI Header Placement
135
Pin Video Connector Schematic
136
Pin Video Connector
136
Recommended Bracket Placement
137
Recommended Bracket Cutout
137
Bracket
137
NLX Considerations
138
Third Party Vendors
140
Voltage Regulator
142
50 Pin Connector
142
Fan/Heatsink
142
Flash Components
142
Video Encoders/Decoders
142
DVD Daughter Cards
143
TV Tuner
143
Application Note 653: Thermal Design Considerations
146
Table of Contents
147
Document Goals
149
Importance of Thermal Management
149
Introduction
149
Intel740™ Graphics Accelerator Packaging Terminology
150
Case Temperature
151
Thermal Specifications
151
Power
152
Airflow Management
153
Designing for Thermal Performance
153
Cooling Solutions
155
System Fans
155
Fan Placement
155
Fan Direction
157
Size and Quantity
157
Fan Venting
157
Vent Placement
157
Vent Area/Size
157
Vent Shape
158
Ducting
158
Ducting Placement
158
Thermal Enhancements
158
Clearance
158
Low Profile Fan Heat Sink
159
Low Profile Fan Heat Sink PCB Layout Guidelines
159
Low Profile Fan Heat Sink Electrical Requirements
160
Low Profile Fan Heat Sink Attach
161
Low Profile Fan Heat Sink Reliability
161
Low Profile Passive Heat Sink
162
Clip Attach
162
Epoxy
162
Tape Attach
163
Reliability
165
Thermal Interface Management for Heat Sink Solutions
165
Bond Line Management
166
Interface Material Performance
166
Case Temperature Measurements
167
Measurements for Thermal Specifications
167
Power Simulation Software
168
Conclusion
170
Attach Sales Locations
171
Low Profile Fan Heat Sink Sales Locations
171
Low Profile Passive Heat Sink Sales Locations
171
Sources
171
Table of Contents
177
Contents
179
Introduction
179
Low Power Mode Overview
179
State Diagrams
180
Supported Single Monitor and Mulitmonitor Configurations
182
Figures
182
Software Sequence
182
Low Power Mode
182
Tables
182
Monitor and Mulitmonitor Configurations
182
Table of Contents
189
1 Introduction
191
Convention Used
191
Objective
191
Scope of this Document
191
2 Pinout
192
Pin Functional Descriptions (Simplified)
194
3 Control Registers
195
Mode Register and Modes Required to be Supported
195
Special Mode Register
195
Color Register
196
4 Command Truth Table
197
5 Operative Command Table
198
6 Row/Column Addressing Per Memory Size/# Banks
203
7 Functional Description
204
Initialization Sequence
204
Power up Sequence
204
NOP and Device Deselect
205
Precharge All
205
Precharge Selected Bank
205
Read Bank
205
Row Activate
205
Write Bank
205
Block Write
206
Mode Register Set
206
Power down Mode
207
8 Essential Functionality for the "PC SGRAM" Device
208
Burst Read and Burst Write
208
Multi- Bank Ping Pong Access
208
Precharge Command after a Burst Read
208
Read and Write with Autoprecharge
208
Precharge Command after a Burst Write
209
Precharge Termination of a Burst Read
209
Precharge Termination of a Burst Write
209
Read Terminated by Read
209
Read Terminated by Write
209
Write Terminated by Read
209
Write Terminated by Write
209
Auto Refresh (CBR) Command
210
Back to Back Command Support
210
9 SGRAM AC/DC Parameters
211
DC Specifications for 100-166 Mhz
211
Specifications for 100-166 Mhz
211
A.C. Timing Parameters for 100-166 Mhz
212
A.C. Specifications for 166-250 Mhz
213
A.C. Timing Parameters for 166-250 Mhz
213
DC Specifications for 166-250 Mhz
213
IBIS: I/V Characteristics for Input and Output Buffers
214
IBIS Reference
215
Table of Contents
219
General Features
221
Labeling
221
Unbuffered Graphics SO-DIMM Module
221
Mechanical Outline
222
Environmental Requirements
223
Pin Assignments
224
Graphics SO-DIMM Block Diagram
225
Address Translation
229
Configuration
229
Default Parameters
229
Clock Frequency and Memory Timing
231
Resistor Strapping Options
231
Serial Presence Detect EEPROM
231
15 Ns Timing
232
Electrical Characteristics
232
10 Ns Timing
233
Timing Diagrams
234
PCB Layout Considerations
236
Clock Routing and Chip Selects
237
Address/Control Routing
238
Data Routing
239
Electrical Specifications
241
Operating Requirements
241
Sdram/Sgram Components D.C. Operating Requirements
241
Memory Timing
242
5
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Intel 740 Specifications
General
Brand
Intel
Model
740
Category
Video Card
Language
English
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