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Intel 740 User Manual
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1
1
3 DEVICE AGP
1.0
PIIX4E (PART I)
INTEL CORPORATION
GRAPHICS COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-79
FOLSOM, CA 95630
Custom
12
4
1
22:16:57
Title
Size
Document Number
Rev
Date:
Sheet
of
AD25
AD24
AD7
AD3
SDD15
SDD8
SDD0
LA18
SD11
SA15
C/BE#1
SDA1
AD1
PDD15
PDD0
SDD14
SA13
AD14
AD13
AD11
PDD2
PDA2
LA23
SD13
SA11
SA5
PDD11
PDD1
SD15
SD12
SA14
SA3
AD22
AD10
AD0
PDA0
R_AD18
SD14
SD1
SA12
SA4
AD18
PDD6
PDD3
SDD10
SD2
SA2
C/BE#0
AD28
AD23
AD12
PDD12
PDD5
PDD4
SA1
C/BE#3
SDA0
LA22
AD31
AD27
PDD14
LA20
SDA2
AD6
PDD13
SDD11
SD9
SD5
SA9
LA21
SD10
SD7
SD3
SA17
SA10
SA7
AD26
AD21
AD16
AD5
PDD8
SD8
SD4
SA19
SA16
SA8
AD30
AD15
PDD10
PDD7
SDD3
SD6
SA18
SA
6
AD29
PDD9
SDD12
SDD2
SD0
SDD4
LA19
LA17
AD20
SDD5
SA0
AD19
AD18
AD9
AD8
AD4
SDD13
SDD7
PDA1
C/BE#2
AD17
AD2
SDD9
SDD6
SDD1
PIIX4E
82371EB
PCI BUS INTERFACE
IDE SIGNALS
ISA/EIO SIGNAL
S
IDE SIGNALS
U24A
PIIX4_15
H17
B18
H16
C18
E15
G19
B15
C17
D14
F20
C14
B17
A14
G16
C13
A18
A13
E18
C12
E20
D12
G18
B13
D18
D13
G17
B14
D20
E14
C20
A15
B20
C15
B10
D15
A20
A19
Y4
U10
A10
Y1
B19
T3
V12
Y15
T14
Y5
W14
C19
U13
T4
V13
D9
Y13
V4
U11
T12
T11
D19
W11
Y12
Y11
D17
T10
V15
W10
C9
U9
U15
V9
E19
Y9
B9
T8
W8
W7
U7
A9
V7
E17
Y7
W1
V6
D8
Y6
E8
T5
F19
W5
B8
U4
A8
D7
V3
W3
C7
U2
B7
T2
W2
A7
Y2
D6
T1
V1
E6
W16
E4
T16
Y17
C4
V17
B4
Y18
W18
W12
Y19
A4
W19
D3
E3
C3
B3
E2
C2
B2
W4
A2
U3
D1
T7
E1
C1
B1
Y3
C8
C6
D4
D2
C10
E5
A5
A3
B5
B6
A1
B12
A12
A6
D5
C5
A17
F18
A16
F17
F16
E10
A11
G20
B11
C11
C16
B16
D16
PCS1#
SCS1#
PCS3#
SCS3#
SDD0
PDDACK#
SDD1
SDA0
SDD2
PDD0
SDD3
SDA1
SDD4
PDA0
SDD5
SDA2
SDD6
PDD1
SDD7
PDD2
SDD8
PDA1
SDD9
PDD3
SDD10
PDA2
SDD11
PDD4
SDD12
PDD5
SDD13
PDD6
SDD14
AD0
SDD15
PDD7
PDD8
AEN
BALE
AD1
IOCHK#
PDD9
IOCHRDY
IOCS16#
LA17
LA18
IOR#
LA19
PDD10
LA20
IOW#
LA21
AD2
LA22
SA19
SA0
LA23
SA1
PDD11
SA2
MEMCS16#
SA3
PDD12
SA4
MEMR#
SA5
AD3
SA6
MEMW#
SA7
PDD13
SA8
AD4
SA9
SA10
REFRESH#
SA11
AD5
SA12
PDD14
SA13
RSTDRV
SA14
AD6
SA15
AD7
SA16
PDD15
SA17
AD8
SA18
AD9
AD10
SD0
SD1
AD11
SD2
AD12
SD3
SD4
AD13
SD5
AD14
SD6
SD7
AD15
SD8
AD16
SD9
SD10
AD17
SD11
AD18
SD12
SD13
SBHE#
SD14
AD19
SD15
AD20
AD21
AD22
AD23
AD24
AD25
AD26
SMEMR#
AD27
SMEMW#
AD28
SYSCLK
AD29
AD30
AD31
ZEROWS#
C/BE#0
C/BE#1
C/BE#2
C/BE#3
CLOCKRUN#
DEVSEL#
FRAME#
IDSEL
IRDY#
PAR
PCIRST#
PHOLD#
PHOLDA#
SERR#
STOP#
TRDY#
SDDACK#
PDREQ
SDREQ
PDIOR#
PDIOW#
REQ0#
REQ1#
PIORDY
REQ2#
REQ3#
SDIOR#
SDIOW#
SIORDY
R125
100
R138
100
R130
33
STOP
#
7,16,17,28
BAL
E
18,29
SDD[15:0
]
19
SERR
#
7,16,17,28
PDIOW
#
19
SMEMW
#
18,29
PDRE
Q
19
PREQ#[3:0
]
7,16,17,28
AE
N
14,18
IOCS16
#
18,29
FRAME
#
7,16,17,28
PCIRST
#
6,15,16,17,38
SDDACK
#
19
DEVSEL
#
7,16,17,28
RSTDR
V
14,26
SCS3
#
19
PIORD
Y
19
IOW
#
14,18,29,33
SYSCL
K
18,33,38
IOCHK
#
18,29
C/BE#[3:0
]
7,16,17
PA
R
7,16,17,28
SD[15:0
]
14,18,29
LA[23:17
]
18,29
PCS3
#
19
SDIOW
#
19
PHLD
#
7,28
SDA[2:0
]
19
SCS1
#
19
MEMW
#
18,21,29
PDA[2:0
]
19
MEMR
#
18,21,29
SBHE
#
18,29
SDRE
Q
19
IOR
#
14,18,29,33
ZEROWS
#
18,29
IOCHRD
Y
14,18,29
SIORD
Y
19
AD[31:0
]
7,16,17
SA[19:0
]
14,18,21,29,33
PHLDA
#
7,28
MEMCS16
#
18,29
SDIOR
#
19
TRDY
#
7,16,17,28
IRDY
#
7,16,17,28
SMEMR
#
18,29
PCS1
#
19
PDIOR
#
19
PDD[15:0
]
19
REFRESH
#
18,29
PDDACK
#
19
97
99
Table of Contents
Table of Contents
3
Revision History
8
Introduction
9
About this Design Guide
11
References
12
Addin Card Design
15
Introduction
15
Design Features
16
Intel740™ Graphics Accelerator
16
MIX and Match Options for Intel740™ Graphics Accelerator Card
16
BT829B - Video Decoder
17
BT869 - TV Encoder
17
Terminology
17
Power Sources
17
Intel740™ Graphics Accelerator Power Supplies
17
Fences
18
Stitching
18
Example of Power Plane Separation ("Fencing")
18
Example of Power Plane Stitching
18
Major Signal Sections
19
Board Description
20
Layout and Routing Guidelines
19
Placement
19
Example ATX Layout
20
Four Layer Board Stack-Up
21
BGA Component
22
Layout Requirements
22
Metal Defined Land Dimensions
22
BGA Trace
22
Ground Connections
23
Power Connections
23
Dogbone Via Pattern
23
Decoupling
24
Suggested VCC Planes for the Intel740™ Graphics Accelerator
24
Intel740™ Graphics Accelerator Decoupling
24
General Signal Routing
25
Voltage Regulator
25
Bt829 Video Decoder
25
Intel740™ Graphics Accelerator BGA Routing Example
25
Ground Planes
26
Power Planes
26
Passive Components and Signal Routing
26
Bt869 Video Encoder
26
Bt829B GND and AGND Pins
26
Bt829B VCC and AVCC Pins
26
Power Planes
27
Passive Components and Signal Routing
27
AGP Layout and Routing Guidelines
27
Bt869 Digital and Analog Power Pins
27
AGP Signal Lengths
27
Strobes and Corresponding Signal Groups
27
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
28
Supported Memory Options
28
Memory Layout Restrictions (See Figure 2-12 and Figure 2-13)
28
Memory Layout Restrictions (See Figure 2-14 and Figure 2-15)
29
Layout Dimensions (MA[11:0])
29
Layout Dimensions (MD[63:0], DQM[7:0])
29
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA1#, CSB0#)
29
Memory Layout Restrictions (See Figure 2-16 and Figure 2-17)
30
Intel740™ Graphics Accelerator Memory Configurations
31
Layout Dimensions (WEB#, SRASB#, SCASB#, CSA0#)
30
Memory Layout Dimensions (TCLK0)
30
Memory Layout Dimensions (TCLK1)
30
Memory Layout Dimensions (RCLK and OCLK to RCLK)
31
MB Local Memory Connection (64-Bit Data Path)
31
TV out Interface
34
Analog Signals
34
UL and FCC Considerations
34
TV Out/Roma Trace Lengths (See Figure 2-22)
34
Layout Dimensions, Digital TV Bus
34
GPIO Functions
35
Addin Card Schematics
35
512Kx32 and 256Kx32 Pinout Compatibility
38
Device AGP Motherboard Design
59
Introduction
59
Overview
59
About this Chapter
60
Block Diagram
60
Implementation Issues
61
Disabling a Master Device
61
Low Power Logic Implementation
62
State of Signals to be Driven after System Reset but at Least One Clock Prior to Asserting TEST
62
GPO27# and GPO28# Signal Duration
63
The Schematic Diagram for GPO27#, PCIRST# (System Reset), RESET#, ROMA16 Signals
62
Signal Duration of the GPO Signals from PIIX4
63
State Diagrams
64
The Schematic Diagram for the WEB#, SCASB#, SRASB#, CS0B#, CS1B# and TEST
63
Intel740™ Graphics Controller (on Board Device) Remains in Low Power Mode
64
Intel740™ Graphics Controller (on Board Device) State Diagram
64
Signal Quality and Timing Issues
65
Strobe Edge Quality Issues
65
Clock Issues
66
Point-To-Point Topology
66
Design Recommendations
67
General Design Recommendation
67
Voltage Definitions
67
Device AGP Motherboard Layout and Routing Guidelines
67
BGA Quadrant Assignment
68
Major Signal Sections
68
Example ATX Placement for a up Pentium
69
Intel ® 440BX Agpset / Intel 740 Graphics Accelerator Design
69
Board Description
70
3-Point AGP Design Guidelines
70
Layout and Routing
70
Four Layer Board Stack-Up
70
Data and Strobe Definitions
71
Data and Associated Strobe
71
Assumptions for Board Design Guidelines
72
Add-In Card Guideline Assumptions
72
Motherboard Guideline Assumptions
72
Data Signal and Strobe Guideline Assumptions
72
Control and Clock Signal Guideline Assumptions
72
Data Signal and Strobe Requirements
72
Control Signal Line Length Requirements
73
3-Load AGP Topology
74
Overall Solution Space
74
Point-To-Point Topology
73
Strobe and Data Segment Solution Space
74
Device Data Load Topology
74
Device Strobe Load Topology
74
Device Data Load Topology (Solution 1 Is Shown)
75
Device Strobe Load Topology (Solution 1 Is Shown)
75
Clock Topology and Matching
75
Intel740™ Graphics Accelerator Memory Layout and Routing Guidelines
76
Clock Segment Solution Space
76
Supported Memory Options
76
Memory Layout Restrictions (See Figure 3-16 and Figure 3-17)
77
Memory Layout Restrictions (See Table 3-16 and Table 3-17)
77
Layout Dimensions (MA[11:0])
77
Layout Dimensions (MD[63:0], DQM[7:0])
77
Memory Layout Restrictions (See Figure 3-19)
78
Device AGP Intel740™ Graphics Accelerator Memory Configurations
79
Layout Dimensions (WEA#, SRASA#, SCASA#, CSA0#)
78
Memory Layout Dimensions (TCLK1)
78
Memory Layout Dimensions (RCLK and OCLK to RCLK)
79
Pentium
80
Device AGP Motherboard Reference Design Schematics
80
512Kx32 and 256Kx32 Pinout Compatibility
84
DIMM Socket
95
Usb Connectors
106
Thermal Considerations
128
Thermal Design Considerations Chart
130
Mechanical Information
132
Mounting Hole Locations (Fan/Heatsink Assembly)
134
Board Dimensions
134
Fan/Heatsink Hole Pattern
134
DVD Daughter Card Dimensions (ATX and NLX)-Top Side
135
VMI Header Placement
135
Pin Video Connector Schematic
136
Pin Video Connector
136
Recommended Bracket Placement
137
Recommended Bracket Cutout
137
Bracket
137
NLX Considerations
138
Third Party Vendors
140
Voltage Regulator
142
50 Pin Connector
142
Fan/Heatsink
142
Flash Components
142
Video Encoders/Decoders
142
DVD Daughter Cards
143
TV Tuner
143
Application Note 653: Thermal Design Considerations
146
Table of Contents
147
Document Goals
149
Importance of Thermal Management
149
Introduction
149
Intel740™ Graphics Accelerator Packaging Terminology
150
Case Temperature
151
Thermal Specifications
151
Power
152
Airflow Management
153
Designing for Thermal Performance
153
Cooling Solutions
155
System Fans
155
Fan Placement
155
Fan Direction
157
Size and Quantity
157
Fan Venting
157
Vent Placement
157
Vent Area/Size
157
Vent Shape
158
Ducting
158
Ducting Placement
158
Thermal Enhancements
158
Clearance
158
Low Profile Fan Heat Sink
159
Low Profile Fan Heat Sink PCB Layout Guidelines
159
Low Profile Fan Heat Sink Electrical Requirements
160
Low Profile Fan Heat Sink Attach
161
Low Profile Fan Heat Sink Reliability
161
Low Profile Passive Heat Sink
162
Clip Attach
162
Epoxy
162
Tape Attach
163
Reliability
165
Thermal Interface Management for Heat Sink Solutions
165
Bond Line Management
166
Interface Material Performance
166
Case Temperature Measurements
167
Measurements for Thermal Specifications
167
Power Simulation Software
168
Conclusion
170
Attach Sales Locations
171
Low Profile Fan Heat Sink Sales Locations
171
Low Profile Passive Heat Sink Sales Locations
171
Sources
171
Table of Contents
177
Contents
179
Introduction
179
Low Power Mode Overview
179
State Diagrams
180
Supported Single Monitor and Mulitmonitor Configurations
182
Figures
182
Software Sequence
182
Low Power Mode
182
Tables
182
Monitor and Mulitmonitor Configurations
182
Table of Contents
189
1 Introduction
191
Convention Used
191
Objective
191
Scope of this Document
191
2 Pinout
192
Pin Functional Descriptions (Simplified)
194
3 Control Registers
195
Mode Register and Modes Required to be Supported
195
Special Mode Register
195
Color Register
196
4 Command Truth Table
197
5 Operative Command Table
198
6 Row/Column Addressing Per Memory Size/# Banks
203
7 Functional Description
204
Initialization Sequence
204
Power up Sequence
204
NOP and Device Deselect
205
Precharge All
205
Precharge Selected Bank
205
Read Bank
205
Row Activate
205
Write Bank
205
Block Write
206
Mode Register Set
206
Power down Mode
207
8 Essential Functionality for the "PC SGRAM" Device
208
Burst Read and Burst Write
208
Multi- Bank Ping Pong Access
208
Precharge Command after a Burst Read
208
Read and Write with Autoprecharge
208
Precharge Command after a Burst Write
209
Precharge Termination of a Burst Read
209
Precharge Termination of a Burst Write
209
Read Terminated by Read
209
Read Terminated by Write
209
Write Terminated by Read
209
Write Terminated by Write
209
Auto Refresh (CBR) Command
210
Back to Back Command Support
210
9 SGRAM AC/DC Parameters
211
DC Specifications for 100-166 Mhz
211
Specifications for 100-166 Mhz
211
A.C. Timing Parameters for 100-166 Mhz
212
A.C. Specifications for 166-250 Mhz
213
A.C. Timing Parameters for 166-250 Mhz
213
DC Specifications for 166-250 Mhz
213
IBIS: I/V Characteristics for Input and Output Buffers
214
IBIS Reference
215
Table of Contents
219
General Features
221
Labeling
221
Unbuffered Graphics SO-DIMM Module
221
Mechanical Outline
222
Environmental Requirements
223
Pin Assignments
224
Graphics SO-DIMM Block Diagram
225
Address Translation
229
Configuration
229
Default Parameters
229
Clock Frequency and Memory Timing
231
Resistor Strapping Options
231
Serial Presence Detect EEPROM
231
15 Ns Timing
232
Electrical Characteristics
232
10 Ns Timing
233
Timing Diagrams
234
PCB Layout Considerations
236
Clock Routing and Chip Selects
237
Address/Control Routing
238
Data Routing
239
Electrical Specifications
241
Operating Requirements
241
Sdram/Sgram Components D.C. Operating Requirements
241
Memory Timing
242
5
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Intel 740 Specifications
General
Brand
Intel
Model
740
Category
Video Card
Language
English
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