IEEE-488 Commands
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register determines which bits from the Status Byte Register (see *STB for its
bit configuration) are allowed to set the Master Status Summary (MSS) bit and
the Request for Service (RQS) summary bit. A 1 in any Service Request Enable
Register bit position enables the corresponding Status Byte Register bit and all
such enabled bits then are logically ORed to cause Bit 6 of the Status Byte
Register to be set.
When the controller conducts a serial poll in response to SRQ, the RQS bit is
cleared, but the MSS bit is not. When *SRE is cleared (by programming it with
0), the power supply cannot generate an SRQ to the controller. The query
returns the current state of *SRE.
Command syntax
*SRE <NRf>
Arguments
0 to 255
Default Value
see *PSC
Example
*SRE 128
Query syntax
*SRE?
Returns
<NR1> (register binary value)
Related Command
*ESE *ESR *PSC
*STB?
This query reads the Status Byte register, which contains the status summary
bits and the Output Queue MAV bit. Reading the Status Byte register does not
clear it. The input summary bits are cleared when the appropriate event
registers are read (see chapter “Programming the Status Registers” for more
information). A serial poll also returns the value of the Status Byte register,
except that bit 6 returns Request for Service (RQS) instead of Master Status
Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it
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