IEEE-488 Reference
4-44
Format *SAV <NRf>
No extended Model 2001-MEM1 Model 2001-MEM2
memory installed installed
<NRf> = 0 <NRf> = 0 to 4 <NRf> = 0 to 9
Description The *SAV command is used to save the current instrument setup configuration in memory for
later recall. Any control affected by *RST (see Appendix B) can be saved by the *SAV com-
mand. The *RCL command is used to restore the instrument to a saved setup configuration (see
paragraph 4.10.9).
If the Model 2001 does not have any extended memory installed, only one setup configuration
can be saved and recalled. In this situation, memory location “0” is the only valid parameter for
the *SAV command. If the Model 2001 has the Model 2001-MEM1 memory element installed,
up to five setup configurations can be saved and recalled. In this situation, memory locations “0”
through “4” are valid parameters. If the Model 2001 has the Model 2001-MEM2 memory ele-
ment installed, up to 10 setup configurations can be saved and recalled. Memory locations “0”
through “9” are then valid parameters.
Programming Example OUTPUT 716; “*SAV 0” ! Store setup at memory location 0.
4.0.12 *SRE service request enable
Description To set the contents of the Service Request Enable Register.
Format *SRE <NRf>
Parameters <NRf> = 0 Clears enable register
= 1 Set MSB bit (Bit 0)
= 4 Set EAV bit (Bit 2)
= 8 Set QSB bit (Bit 3)
= 16 Set MAV bit (Bit 4)
= 32 Set ESB bit (Bit 5)
= 128 Set OSB bit (Bit 7)
Defaults Power-up Clears register
*CLS No effect
*RST No effect
:STATus:PRESet No effect
DCL, SDC No effect
Description The *SRE command is used to set the contents of the Service Request Enable Register. This
command is sent with the decimal equivalent of the binary value that determines the desired state
(0 or 1) of each bit in the register.
This enable register is used along with the Status Byte Register to generate service requests
(SRQ). With a bit in the Service Request Enable Register set, an SRQ will occur when the cor-
responding bit in the Status Byte Register is set by an appropriate event. For details on register
structure, refer to paragraph 4.6.
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