Keithley 2001

Figure 3-33 DUT test system (asynchronous example #2)........................................................................................... 3-73
Figure 3-34 Trigger Link connections (asynchronous example #2) ............................................................................. 3-74
Figure 3-35 Operation model for asynchronous Trigger Link example #2 .................................................................. 3-76
Figure 3-36 Semi-synchronous Trigger Link specifications......................................................................................... 3-77
Figure 3-37 Typical semi-synchronous mode connections........................................................................................... 3-77
Figure 3-38 Trigger Link connections (semi-synchronous example)........................................................................... 3-78
Figure 3-39 Operation mode for semi-synchronous Trigger Link example ................................................................. 3-79
Figure 3-40 Digital filter ............................................................................................................................................... 3-87
Figure 3-41 Analog filter............................................................................................................................................... 3-92
Figure 3-42 SCAN key menu structure....................................................................................................................... 3-100
Figure 3-43 SCAN key menu structure for ratio and delta ......................................................................................... 3-101
Figure 3-44 Limits bar graph example........................................................................................................................ 3-117
Figure 3-45 Using limit test to sort 100 Ω resistors..................................................................................................... 3-119
Figure 3-46 Digital I/O port ........................................................................................................................................ 3-120
Figure 3-47 Digital I/O port simplified schematic ..................................................................................................... 3-121
Figure 3-48 Sample externally powered relay ........................................................................................................... 3-122
Figure 3-49 Line cycle synchronization...................................................................................................................... 3-125
4 IEEE-488 Reference
Figure 4-1 IEEE-488 connector .................................................................................................................................... 4-2
Figure 4-2 IEEE-488 connections................................................................................................................................. 4-2
Figure 4-3 IEEE-488 connector location ...................................................................................................................... 4-2
Figure 4-4 Contact assignments.................................................................................................................................... 4-3
Figure 4-5 Model 2001 status register structure............................................................................................................ 4-6
Figure 4-6 Standard event status................................................................................................................................... 4-7
Figure 4-7 Operation event status ................................................................................................................................. 4-8
Figure 4-8 Arm event status........................................................................................................................................ 4-10
Figure 4-9 Sequence event status................................................................................................................................ 4-11
Figure 4-10 Trigger event status ................................................................................................................................... 4-13
Figure 4-11 Measurement event status.......................................................................................................................... 4-15
Figure 4-12 Questionable event status .......................................................................................................................... 4-17
Figure 4-13 Status byte and service request (SRQ) ...................................................................................................... 4-19
Figure 4-14 Trigger Model (IEEE-488 bus operation) ................................................................................................. 4-22
Figure 4-15 Standard Event Enable Register................................................................................................................ 4-37
Figure 4-16 Standard Event Status Register ................................................................................................................. 4-39
Figure 4-17 Service Request Enable Register............................................................................................................... 4-45
Figure 4-18 Status Byte Register .................................................................................................................................. 4-47
Figure 4-19 ASCII data format ..................................................................................................................................... 4-86
Figure 4-20 IEEE754 single precision data format (32 data bits)................................................................................. 4-87
Figure 4-21 IEEE754 double precision data format (64 data bits) ............................................................................... 4-87
Figure 4-22 Measurement Event Register................................................................................................................... 4-172
Figure 4-23 Questionable Event Register ................................................................................................................... 4-173
Figure 4-24 Operation Event Register ........................................................................................................................ 4-174
Figure 4-25 Trigger Event Register ............................................................................................................................ 4-174
Figure 4-26 Arm Event Register................................................................................................................................. 4-175
Figure 4-27 Sequence Event Register......................................................................................................................... 4-175
Figure 4-28 Measurement Event Enable Register....................................................................................................... 4-177
Figure 4-29 Questionable Event Enable Register ....................................................................................................... 4-178
Figure 4-30 Operation Event Enable Register ............................................................................................................ 4-178
Figure 4-31 Trigger Event Enable Register ................................................................................................................ 4-179
Figure 4-32 Arm Event Enable Register..................................................................................................................... 4-179
Figure 4-33 Sequence Event Enable Register............................................................................................................. 4-179
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