SICK microScan3 Core I/O User Manual

LS-MS3-CO-IO-5M
In sleep mode, no output
load
Typ. 6.5 W
Power-up delay ≤ 12 s
Safety outputs (OSSD)
Type of output 2 PNP semiconductors for each OSSD pair, short-circuit pro‐
t
ected, cross-circuit monitored
Output voltage for ON state
(H
IGH)
(U
V
–2.7 V) … U
V
Output voltage for OFF state
(LOW)
0 V … 2 V
Output current for ON state
(HIGH)
≤ 250 mA per OSSD
Leakage current
3)
≤ 250 µA
Load inductance ≤ 2.2 H
Load capacity ≤ 2.2 µF in series with 50 Ω
Switching sequence (no tog‐
glin
g and no simultaneous
monitoring)
Depending on the load inductance
Permissible resistivity
between load and device
≤ 2.5 Ω
Test pulse width ≤ 300 µs (typ. 230 µs)
Test pulse interval
Scan cycle time 30 ms 240 ms … 264 ms (typ. 240 ms)
Scan cycle time 40 ms 320 ms to 344 ms (typ. 320 ms)
Scan cycle time 50 ms 400 ms
Duration of OFF state ≥ 80 ms
Discrepancy time (offset
be
tween switching from
OSSD2 and OSSD1 within an
OSSD pair)
≤ 1 ms (typ. 25 µs)
Universal output, universal I/O (configured as output)
Output voltage HIGH (U
V
–3.7 V
) … U
V
Output voltage LOW 0 V … 2 V
Output current HIGH ≤ 200 mA
Leakage current ≤ 0.5 mA
Switch-on delay 40 ms
Switch-off delay 40 ms
Static control input, universal input, universal I/O (configured as input)
Input voltage HIGH 24 V (13 V … 30 V)
Input voltage LOW 0 V (–30 V … 5 V)
Input current HIGH 3 mA … 6 mA
Input current LOW 0 mA … 2 mA
Input resistance at HIGH Typ. 5 kΩ
Input capacity 10 nF
Input frequency (max.
s
witching sequence when
used as control input)
≤ 20 Hz
TECHNICAL DATA 14
8025870/2020-09-04 | SICK O P E R A T I N G I N S T R U C T I O N S | microScan3 Core I/O
145
Subject to change without notice

SICK microScan3 Core I/O Specifications

General

Brand	SICK
Model	microScan3 Core I/O
Category	Scanner
Language	English