Supermicro SSE-F3548S - Topology 3 - Single Uplink Switch Topology

Supermicro SSE-F3548S/SSE-F3548SR Configuration User’s Guide
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5.2.3 Topology 3 - Single Uplink Switch Topology
Figure MLAG-3
In Figure MLAG-3, Switch A and Switch B are peer switches in the MLAG. Switches A and B are connected
through an IPL port channel interface.
The server is connected to both MLAG peer switches through a regular LACP port channel interface.
Uplink Switch 1 is connected to MLAG peer switches Switch A and Switch B through a regular LACP port
channel interface.
On the Switch A and Switch B sides, the ports connected to the server are configured with the same
MLAG enabled port channel number. Similarly, the ports connected to Uplink Switch 1 are configured
with the same MLAG port channel number.
The reason for LAG in the uplink switch is to make sure the uplink switch does not send the
same packet (broadcast or multicast) to both MLAG peer switches.
Server
LACP PO
IPL - PO
Switch B
Switch A
Uplink Switch 1
MLAG Port Channel
LACP PO
MLAG Port Channel