ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 7-1
ID073015 Non-Confidential
Chapter 7
Level 1 Memory System
This chapter describes the L1 Memory System. It contains the following sections:
• About the L1 memory system on page 7-2
• Security Extensions support on page 7-4
• About the L1 instruction side memory system on page 7-5
• About the L1 data side memory system on page 7-8
• About DSB on page 7-10
• Data prefetching on page 7-11
• Parity error support on page 7-12.
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