ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. B-1
ID073015 Non-Confidential
Appendix B
Cycle Timings and Interlock Behavior
This chapter describes the cycle timings of integer instructions on Cortex-A9 processors. It
contains the following sections:
• About instruction cycle timing on page B-2
• Data-processing instructions on page B-3
• Load and store instructions on page B-4
• Multiplication instructions on page B-7
• Branch instructions on page B-8
• Serializing instructions on page B-9.
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