ARM Cortex A9 - Page 92

System Control
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Figure 4-23 Configuration Base Address Register bit assignments
To access the Configuration Base Address Register, read or write the CP15 register with:
MRC p15,4,<Rd>,c15,c0,0; Read Configuration Base Address Register
MCR p15,4,<Rd>,c15,c0,0; Write Configuration Base Address Register
4.3.25 TLB lockdown operations
TLB lockdown operations enable saving or restoring lockdown entries in the TLB. Table 4-50
shows the defined TLB lockdown operations.
The Select Lockdown TLB entry for a read operation is used to select the entry that the data read
by a read Lockdown TLB VA/PA/attributes operations are coming from. The Select Lockdown
TLB entry for a write operation is used to select the entry that the data write Lockdown TLB
VA/PA/attributes data are written to. The TLB PA register must be the last written or read
register when accessing TLB lockdown registers. Figure 4-24 shows the bit assignment of the
index register used to access the lockdown TLB entries.
Figure 4-24 Lockdown TLB index bit assignments
Figure 4-25 shows the bit arrangement of the TLB VA Register format.
Figure 4-25 TLB VA Register bit assignments
Base address
31 0
Table 4-50 TLB lockdown operations
Description Data Instruction
Select Lockdown TLB Entry for Read Main TLB Index
MCR p15,5,<Rd>,c15,c4,2
Select Lockdown TLB Entry for Write Main TLB Index MCR p15,5,<Rd>,c15,c4,4
Read Lockdown TLB VA Register Data MRC p15,5,<Rd>,c15,c5,2
Write Lockdown TLB VA Register Data MCR p15,5,<Rd>,c15,c5,2
Read Lockdown TLB PA Register Data MRC p15,5,<Rd>,c15,c6,2
Write Lockdown TLB PA Register Data MCR p15,5,<Rd>,c15,c6,2
Read Lockdown TLB attributes Register Data MRC p15,5,<Rd>,c15,c7,2
Write Lockdown TLB attributes Register Data MCR p15,5,<Rd>,c15,c7,2
31 21 0
UNK/SBZP
Index
VPN
31 10 0
Process
11
11 10 9
UNK/SBZP
NS
12