MPC5200B Memory Map
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 3-5
3.3.3 Memory Map Space Register Description
These registers exist in the Memory Map register space relative to Memory Base Address Register (MBAR).
3.3.3.1 Memory Address Base Register —MBAR + 0x0000
3.3.3.2 Boot and Chip Select Addresses
msb 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
Reserved
W
RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
R
Base Address Register
W
RESET1000000000000000
Bits Name Description
0:15 Reserved These bits are reserved.
16:31 Base Address
Register
Provides the offset to which all register space for MPC5200B is accessed. The reset value
of this register is 0x8000, which provides for a MBAR of 0x8000 0000. All of MPC5200B
registers are then accessible at MBAR+offset, where offset refers to the given value in
Tabl e 3 -1 for the respective module.
MBAR
offset
Name Description
0x0004 CS0 Start
Address
Chip Select 0 through the LocalPlus Bus. Any access on an address between the Start
and Stop Addresses enables this chip select.
0x0008 CS0 Stop
Address
0x000C CS1 Start
Address
Chip Select 1 through the LocalPlus Bus. Any access on an address between the Start
and Stop Addresses enables this chip select.
0x0010 CS1 Stop
Address
0x0014 CS2 Start
Address
Chip Select 2 through the LocalPlus Bus. Any access on an address between the Start
and Stop Addresses enables this chip select.
0x0018 CS2 Stop
Address
0x001C CS3 Start
Address
Chip Select 3 through the LocalPlus Bus. Any access on an address between the Start
and Stop Addresses enables this chip select.
0x0020 CS3 Stop
Address
0x0024 CS4 Start
Address
Chip Select 4 through the LocalPlus Bus. Any access on an address between the Start
and Stop Addresses enables this chip select.
0x0028 CS4 Stop
Address
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