Freescale Semiconductor MPC5200B - Simplified Block Diagram-Mpc5200; Block Diagram

Architecture
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 1-3
A dynamically managed external pin multiplexing scheme minimizes overall pin count. The result is low cost packaging and board assembly
costs.
Figure 1-1 shows a simplified MPC5200B block diagram.
Figure 1-1. Simplified Block Diagram—MPC5200B
e300 Core
SDRAM / DDR
JTAG / COP
Interface
Reset / Clock
MSCAN
Real-Time Clock System Functions Interrupt Controller GPIO/Timers PCI Bus Controller LocalPlus Controller ATA Host Controller
Systems Interface Unit (SIU)
SDRAM / DDR
CommBus
Local
BestComm DMA
SRAM 16K
Bus
J1850
USB
SPI
I
2
C
Ethernet
PSC
Memory Controller
Generation
2x
2x
2x
6x