Freescale Semiconductor MPC5200B - ICTL Peripheral Interrupt Status All Register-Mbar + 0 X0530

MPC5200B Users Guide, Rev. 1
7-18 Freescale Semiconductor
Interrupt Controller
7.2.4.13 ICTL Peripheral Interrupt Status All Register—MBAR + 0x0538
16 PSa6 USB
17 PSa7 ATA
18 PSa8 PCI Control module
19 PSa9 PCI SC Initiator Rx
20 PSa10 PCI SC Initiator Tx
21 PSa11 PSC4
22 PSa12 PSC5
23 PSa13 SPI modf
24 PSa14 SPI spif
25 PSa15 I
2
C1
26 PSa16 I
2
C2
27 PSa17 CAN1
28 PSa18 CAN2
29:30 — Reserved
31 PSa21 XLB Arbiter
Note:
1. These interrupts are directly maskable by ICTL Peripheral Interrupt Mask Register. However, PSa status occurs
regardless of Per_Mask setting, as long as the source module interrupt is enabled in the source module registers.
Table 7-16. ICTL Bus Error Status Register
msb 012345678 9 101112131415
R
Reserved BE1 BE0 Reserved
W
RESET:0 00000000 0 0 0 00 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
R
Reserved
W
RESET:0 00000000 0 0 0 00 0 0
Bits Name Description
0:5 — Reserved
6 BE1 Bus Error 1—Indicates write attempt to read-only register, clear with a write to 1.
7 BE2 Bus Error 0—Indicates access to unimplemented register, clear with a write to 1.
8:31 — Reserved
Bits Name Description