MPC5200B Users Guide, Rev. 1
8-32 Freescale Semiconductor
Address Bus Mapping
By default, the Memory Controller only provides 12 row address bits and 12 column address bits. To enable the 13
th
row address bit, the
hi_addr bit of the Control register must be set to 1 (MBAR+0x0104, Control[7]). This also reduces the column address width to 11 bits.
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