PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 15-15
15.2.6 Rx Buffer Register (0x0C) — RB
Data are read from the Rx FIFO by reading from this read-only register. The Rx FIFO size is 512 bytes. To read data from the RX FIFO you
can also use the RFDATA register, see Section 15.2.30, Rx FIFO Data (0x60)—RFDATA.
Table 15-17. Rx Buffer Register (0x0C) for UART/SIR/MIR/FIR/Codec8/16/32
msb 012345678 9 1011121314 15
RRB[0:15]
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
RRB[16:31]
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
Table 15-18. Rx Buffer Register (0x0C) for AC97
msb 012345678 9 1011121314 15
RRB[0:15]
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
R RB[16:19] SOF
Reserved
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
Table 15-19. Rx Buffer Register (0x0C) for Codec24
msb 012345678 9 1011121314 15
RRB[0:15]
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
RRB[16:23]
Reserved
W
Used by Tx Buffer
RESET:0 00000000 0 0 0 00 0 0
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