PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 15-21
Table 15-28. Interrupt Mask Register (0x14) for UART / SIR Mode
msb 012345678 9 101112131415 lsb
R
Reserved
WIPC
Reserved
ORERR
TxEMP
DB
RxRDY
FFULL
TxRDY
Reserved
Error Reserved
RESET:0 00000000 0 0 0 00 0 0
Table 15-29. Interrupt Mask Register (0x14) for other Modes
msb 012345678 9 101112131415 lsb
R
Reserved
WIPC
Reserved
ORERR
URERR
Reserved
RxRDY
FFULL
TxRDY
DEOF
Error
Reserved
CMD_SEND
DATA_OVR
DATA_VALID
UNEX_RX_
SLOT
RESET:0 00000000 0 0 0 00 0 0
Bit Name Description
0 IPC Input port change interrupt.
0 = IPC has no effect on the interrupt.
1 = Enable the interrupt for IPC in the ISR register.
1:2 — Reserved
3 ORERR Overrun Error
0 = ORERR has no effect on the interrupt.
1 = Enable the interrupt for ORERR
4 TxEMP/
URERR
UART / SIR—TxEMP
0 = TxEMP has no effect on the interrupt.
1 = Enable the interrupt for TxEMP
other Modes—Underrun Error.
0 = URERR has no effect on the interrupt.
1 = Enable the interrupt for URERR.
5DBUART / SIR —Delta Break
0 = DB has no effect on the interrupt.
1 = Enable the interrupt for DB
other Modes—Reserved
6RxRDY
FFULL
Rx FIFO over threshold
0 = RxRDY/FFULL has no effect on the interrupt.
1 = Enable the interrupt for RxRDY/FFULL.
7 TxRDY Transmitter ready
0 = TxRDY has no effect on the interrupt.
1 = Enable the interrupt for TxRDY
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