Freescale Semiconductor MPC5200B - Page 58

Pinout Tables
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 2-13
VDD_MEM_IO P17
VDD_MEM_IO T17
VSS_IO/CORE D04
VSS_IO/CORE D16
VSS_IO/CORE J09
VSS_IO/CORE J10
VSS_IO/CORE J11
Table 2-3. LocalPlus Bus Address / Data Pin Assignments
MPC5200B
LocaLPlus Bus
Address / Data
Pins
E
X
T
_
A
D
3
1
E
X
T
_
A
D
3
0
E
X
T
_
A
D
2
9
E
X
T
_
A
D
2
8
E
X
T
_
A
D
2
7
E
X
T
_
A
D
2
6
E
X
T
_
A
D
2
5
E
X
T
_
A
D
2
4
E
X
T
_
A
D
2
3
E
X
T
_
A
D
2
2
E
X
T
_
A
D
2
1
E
X
T
_
A
D
2
0
E
X
T
_
A
D
1
9
E
X
T
_
A
D
1
8
E
X
T
_
A
D
1
7
E
X
T
_
A
D
1
6
E
X
T
_
A
D
1
5
E
X
T
_
A
D
1
4
E
X
T
_
A
D
1
3
E
X
T
_
A
D
1
2
E
X
T
_
A
D
1
1
E
X
T
_
A
D
1
0
E
X
T
_
A
D
9
E
X
T
_
A
D
8
E
X
T
_
A
D
7
E
X
T
_
A
D
6
E
X
T
_
A
D
5
E
X
T
_
A
D
4
E
X
T
_
A
D
3
E
X
T
_
A
D
2
E
X
T
_
A
D
1
E
X
T
_
A
D
0
16 bit Adr,
16 bit Data
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
D
0
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
1
5
A
1
4
A
1
3
A
1
2
A
1
1
A
1
0
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
24 bit Adr,
8 bit Data
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
2
3
A
2
2
A
2
1
A
2
0
A
1
9
A
1
8
A
1
7
A
1
6
A
1
5
A
1
4
A
1
3
A
1
2
A
1
1
A
1
0
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Muxed modes
All Muxed mode
Address tenures
0T
S
1
Z
E
2
T
S
1
Z
E
1
T
S
1
Z
E
0
0B
S
1
B
S
0
A
2
4
A
2
3
A
2
2
A
2
1
A
2
0
A
1
9
A
1
8
A
1
7
A
1
6
A
1
5
A
1
4
A
1
3
A
1
2
A
1
1
A
1
0
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
8 bit Data
tenure
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0000000000000000
16 bit Data tenure
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
3
D
2
D
0
32 bit Data tenure
D
3
1
D
3
0
D
2
9
D
2
8
D
2
7
D
2
6
D
2
5
D
2
4
D
2
3
D
2
2
D
2
1
D
2
0
D
1
9
D
1
8
D
1
7
D
1
6
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Table 2-2. Signals by Signal Name (continued)
Signal Name Ball/Pin Signal Name Ball/Pin