Freescale Semiconductor MPC5200B - Page 638

Transfer Initiation and Interrupt
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 18-21
Figure 18-9. Software Flowchart of Typical I2C Interrupt Routine
Clear
Master
Mode
?
Tx/Rx
?
Last Byte
Transmitted
?
RXAK=0
?
End Of
Addr Cycle
(Master Rx)
?
Write Next
Byte To MDR
Switch To
Rx Mode
Dummy Read
From MDR
Generate
Stop Signal
Read Data
From MDR
And Store
Set TXAK =1
Generate
Stop Signal
2nd Last
Byte To Be Read
?
Last
Byte To Be Read
?
Arbitration
Lost
?
AAS=1
?
AAS=1
?
SRW=1
?
TX/RX
?
Set TX
Mode
Write Data
To MDR
Set RX
Mode
Dummy Read
From MDR
ACK From
Receiver
?
Tx Next
Byte
Read Data
From MDR
And Store
Switch To
Rx Mode
Dummy Read
From MDR
RTI
YN
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
N
N
N
N
N
N
N
Y
TX RX
RX
TX
(Write)
(Read)
N
IF
Address
Data Transfer
Transfer
Clear AL
AKF=1
?
N
Clear AKF, AL
Y