Freescale Semiconductor MPC5200B - Page 647

MPC5200B Users Guide, Rev. 1
19-8 Freescale Semiconductor
Memory Map / Register Definition
19.5.5 MSCAN Bus Timing Register 0 (CANBTR0)—MBAR + 0x0904 / 0x984
The MSCAN Bus Timing Register 0 provides for various bus timing control of the MSCAN module.
Read: Anytime
Write: Anytime in Initialization Mode (INITRQ = 1 and INITAK = 1)
6SLPAK
Sleep Mode Acknowledge—flag indicates whether MSCAN module has entered sleep mode.
It is used as a handshake flag for SLPRQ sleep mode request. Sleep mode is active when
INITRQ=1 and INITAK=1. Depending on the WUPE bit setting, MSCAN clears the flag if it
detects bus activity on CAN while in Sleep Mode.
0 = Running—MSCAN operates normally
1 = Sleep Mode Active—MSCAN has entered Sleep Mode
7INITAK
Initialization Mode Acknowledge—flag indicates whether MSCAN module is in initialization
mode. It is used as a handshake flag for the INITRQ initialization mode request. Initialization
mode is active when INITRQ=1 and INITAK=1. The registers CANCTL1, CANBTR0,
CANBTR1, CANIDAC, CANIDAR0-7, CANIDMR0-7 can only be written by the CPU when the
MSCAN is in initialization mode.
0 = Running – The MSCAN operates normally
1 = Initialization Mode Active – The MSCAN has entered initialization mode
Table 19-5. MSCAN Bus Timing Register 0
msb 01234567 lsb
R SJW[1:0] BRP[5:0]
W
RESET:00000000
Bit Name Description
0:1 SJW[1:0] Synchronization Jump Width—defines the maximum number of time quanta (Tq) clock
cycles a bit can be shortened or lengthened to achieve re-synchronization to data transitions
on the bus.
00 = 1 Tq clock cycle
01 = 2 Tq clock cycles
10 = 3 Tq clock cycles
11 = 4 Tq clock cycles
2:7 BRP[5:0] Baud Rate Prescaler—bits determine time quanta (Tq) clock used to build up individual bit
timing, see Ta ble 1 9- 6.
Table 19-6. Baud Rate Prescaler
BRP5 BRP4 BRP3 BRP2 BRP1 BRP0 Prescaler Value (P)
0000 0 0 1
0000 0 1 2
0000 1 0 3
0000 1 1 4
........................................................................................................................................
Bit Name Description