Hioki 7075 - Output Terminals and Functions; Master Clk out; Sync Clk out

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7.1 Output Terminals and Functions
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7.1.1 MASTER CLK OUT
NOTE
47 Ω
AC125
7.1.2 SYNC CLK OUT
NOTE
47 Ω
AC 125
7.1 Output Terminals and Functions
(1) Function
During synchronized drive operation, this clock signal is output to
synchronize waveform data.
This clock signal is not output when synchronized drive is not enabled.
When set as a slave unit, this signal is output only if there is a signal at the
MASTER CLK IN terminal.
(2) Output format
Logic level
(4.0 V V
H
5.0 V,
0V V
L
0.8 V,
with no loading)
Output impedance: 47 Ω
(1) Function
During synchronized drive operation, this clock signal is output to
synchronize multiple 7075 units.
This clock signal is not output when synchronized drive is not enabled.
When set as a slave unit, this signal is output only if there is a signal at the
MASTER CLK IN terminal.
(2) Output format
Logic level
(4.0 V V
H
5.0 V,
0V V
L
0.8 V,
with no loading)
Output impedance: 47 Ω