Hioki 7075 - Input Terminals and Functions; Master Clock in; Sync Clock in

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7.2 Input Terminals and Functions
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7.2.1 MASTER CLOCK IN
NOTE
7.2.2 SYNC CLOCK IN
NOTE
7.2 Input Terminals and Functions
(1) Function
The clock signal input here controls waveform data output during externally
controlled synchronized drive operation.
(2) Input format
Logic level (4.0 V V
H
5.0 V, 0 V V
L
0.8 V, with no loading)
Input impedance: 47 kΩ
Synchronized drive requires that this terminal be connected to the MASTER
CLK OUT terminal of another 7075.
With the slave setting, no waveform is output unless a clock signal is input.
Even with no clock input, the RUN/STOP indicator on the front panel lights
red.
Improper operation may occur if input is supplied from a source other than
the MASTER CLK OUT terminal of a 7075.
(1) Function
This clock input is for synchronization with the master unit during
synchronized drive operation.
(2) Input format
Logic level (4.0 V V
H
5.0 V, 0 V V
L
0.8 V, with no loading)
Input impedance: 47 kΩ
Synchronized drive requires that this terminal be connected to the SYNC
CLOCK OUT terminal of another 7075.
With the slave setting, no waveform is output unless a clock signal is input.
Even with no clock input, the RUN/STOP indicator on the front panel lights
red.
Improper operation may occur if input is supplied from a source other than
the MASTER CLK OUT terminal of a 7075.