Hioki 7075 - The Input Buffer and the Output Queue

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8.2 Operations
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The bits of event status register 0
Bit 7
EOFO
End Of File Operation
Bit 6
EOWL
End Of Waveform Input Loading
Bit 5
EOSL
End Of Sweep File Loading
Bit 4
EORO
End Of Reset Operation
Bit 3
Bit 2
Bit 1
Bit 0
8.2.9 The Input Buffer and the Output Queue
The following commands are used for reading the event status register 0, and
for setting the event status enable register 0 and for reading it.
Reading event status register 0
:ESR0?
Setting event status enable register 0
:ESE0
Reading event status enable register 0
:ESE0?
(1) Input buffer
The 7075 has an input buffer of 256 bytes capacity. Messages which are
received are put into this buffer and executed in order.
When more than 256 bytes of data are sent so the buffer becomes full, the
GP-IB bus enters the waiting state until buffer space becomes available.
(2) Output queue
The 7075 has an output queue of 256 bytes capacity.
Response messages are accumulated in this queue and are read out from the
controller.
The circumstances when the output queue is cleared are as listed below:
1. When a device clear is issued.
2.Whenthepoweristurnedoffandturnedonagain.
When 256 bytes of response messages have been queued, the next response
message is held in a waiting state until space becomes available. In this
condition, if data in the input buffer also exceeds 256 bytes, a query error
occurs and the output queue is cleared.