Intel 740 - Page 226

SO-DIMM Module — Unbuffered SDRAM/SGRAM Graphics
6
Revision 0.91
Figure 3. 512K/1M x 64 SGRAM SO-DIMM Block Diagram (2 banks of two 256K/512K x 32)
DQM0
DQ[7:0]
DQM1
DQ[15:8]
DQM2
DQ[23:16]
DQM3
DQ[31:24]
CS0
DQM4
DQ[39:32]
DQM5
DQ[47:40]
DQM6
DQ[55:48]
DQM7
DQ[63:56]
512Kx32
Or
256Kx32
SGRAM
D1
CS
SCL
VSS
SBA
A2
A1
A0
CLK0 D0, D1
Serial
PD
(optional)
SDA
CKE D0 to D3
D0 to D3/RAS
/CAS D0 to D3
D0 to D3/WE
DSF D0 to D3
D0 to D3A[10:0]
VCC
VSS
D0 to D3
D0 to D3
Three bypass capacitors per
SGRAM device (refer to
component section).
A002.vsd
512Kx32
Or
256Kx32
SGRAM
D0
CS
512Kx32
Or
256Kx32
SGRAM
D2
CS
512Kx32
Or
256Kx32
SGRAM
D3
CS
CLK1 D2, D3
CS1