Signal Descriptions
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. A-16
ID073015 Non-Confidential
See Cortex-A9 specific events on page 11-8.
PMUEVENT[47]
0x8B
Data engine clock enabled
PMUEVENT[48]
0x90
ISB
PMUEVENT[49]
0x91
DSB
PMUEVENT[50]
0x92
DMB
PMUEVENT[51]
0x93
External interrupt
PMUEVENT[52] 0xA0 PLE cache line request completed
PMUEVENT[53] 0xA1 PLE cache line request skipped
PMUEVENT[54] 0xA2 PLE FIFO Flush
PMUEVENT[55] 0xA3 PLE request completed
PMUEVENT[56] 0xA4 PLE FIFO Overflow
PMUEVENT[57] 0xA5 PLE request programmed
a. Not generated by Cortex-A9 processors. Replaced by the similar event
0x68
.
b. Not generated by Cortex-A9 processors. Replaced by the similar event
0x6E
.
c. Used in multiprocessor configurations.
Table A-18 Event signals and event numbers (continued)
Name Event number Description
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