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ARM Cortex A9 - Page 70

ARM Cortex A9
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System Control
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 4-21
ID073015 Non-Confidential
4.3.4 Revision ID register
The REVIDR characteristics are:
Purpose Provides implementation-specific minor revision information that can
only be interpreted in conjunction with the MIDR.
Usage constraints The REVIDR is:
a read-only register
common to the Secure and Non-secure states
only accessible in privileged modes.
Configurations Available in all configurations.
Attributes See the register summary in Table 4-2 on page 4-5.
Figure 4-4 shows the REVIDR bit assignments.
Figure 4-4 REVIDR bit assignments
Table 4-31 shows the REVIDR bit assignments.
To access the REVIDR, read the CP15 register with:
MRC p15, 0, <Rt>, c0, c0, 6; Read Revision ID Register
4.3.5 Cache Size Identification Register
The CCSIDR characteristics are:
Purpose Provides information about the architecture of the caches selected by
CSSELR.
Usage constraints The CCSIDR is:
only accessible in privileged modes
common to the Secure and Non-secure states.
Configurations Available in all configurations.
Attributes See the register summary in Table 4-2 on page 4-5.
Figure 4-5 on page 4-22 shows the CCSIDR bit assignments.
31 0
ID number
Table 4-31 REVIDR bit assignments
Bits Name Function
[31:0] ID number Implementation-specific revision information.
The reset value is determined by the specific Cortex-A9 implementation.

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