Cisco D9854 Installation And Configuration Guide

Chapter 5 Web GUI Setup and Monitoring
284
The Main Board - Firmware Versions area displays the following version
information:
Firmware Version
Description
Boot5514/Boot7109
Software boot-loader version that initializes and
configures the STi5514/STi7109 device on the TMB
(main) board. This is the master controller for the
D9854/D9854-I receiver.
CPLD-5514/CPLD-7109
Software Configurable Programmable Logic Device
version attached to the STi5514/STi7109.
FP-PIC
Front panel controller version for the D9854/D9854-
I receiver.
FPGA Type
This is the manufacturer's designation for the FPGA
device on the main board.
FPGA ID
This is used by the decoder software to determine
what features are available in the FPGA.
Safe SW Version
Version of the installed safe application, which
cannot be overwritten by another downloaded
application.
Safe FPGA Version
Version of the installed safe FPGA image, which
cannot be overwritten by another downloaded
FPGA image.
App Safe Limit
Indicates the version of the oldest application that
can be installed on the current unit. If this value is
zero, the oldest application limit is the Safe SW
Version. If this is greater than zero, the shown value
or older and the Safe SW Version is the limit. Older
applications will not be installed.
The HW Board Versions table displays the revisions, option bits, and serial numbers
of the main board.
In the App/FPGA Downloads area, click Browse to select the new version of FPGA
or the software application of the receiver. The Open dialog opens. Select the
upgrade file and click Open. Click Download to download the selected upgrade file.
File formats that can be downloaded include application CDTs and FPGA CDTs. The
State field in the Download Status area displays the progress of the download.
When the download is complete, a Successfully Completed message is displayed at
the top of the Versions page.
Note: For application downloads, once the download is complete, the D9854/D9854-
I receiver will reboot automatically. For FPGA downloads, you must click Reboot
Receiver in the Service Actions page (Support > Service Actions) to manually
reboot the unit and complete the download. This is to facilitate the typical case in
which the user intends to flash the FPGA file (no auto reboot) followed by an APP
download (auto reboot).

Cisco D9854 Specifications

General

Model	D9854
Category	Receiver
Output	ASI, IP
Decoding	MPEG-2
Conditional Access	BISS
Receiver Type	Professional IRD
解密	DVB-CSA, BISS, AES
Input Frequency Range	950 MHz to 2150 MHz
Modulation Formats	QPSK, 8PSK
Symbol Rate	1 to 45 Msps
Power Supply	100-240 VAC, 50/60 Hz
Power Consumption	40W (typical)
Operating Temperature	0°C