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Fluke Wavetek-Datron 395 - Gpib Error Handling and Status Reporting; Rs-232-C Programming

Fluke Wavetek-Datron 395
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5.9 RS-232-C PROGRAMMING
Section 2 describes the model395 installation and interconnections for RS-232-C.
Be
sure that you have the baud rate set correctly at the Model 395 and at the DTE.
5.10 GPIB ERROR HANDLING AND STATUS REPORTING
Errors
and
status
in
the 395 are handled
as
described for Device Status Reporting
consistent with the IEEE-488.2 standard
in
Chapter 11. Errors and status
may
be
monitored by reading the IEEE-488.1 Status Register, either by seriaI polling the 395
or by sending a Status Byte read command (*STB?) to the 395. Bach module has its own
Status Byte associated with its own secondary address. The seriaI polI
or
the *STB?
query have to be done to the primary and secondary address
of
the module.
Three bits in the Status Byte are defined as folIows:
Bit 6 (0107): RQSIMSS
RQSIMSS
acts as a summary
bit
for the rest
of
the Status Byte bits.
If
any
of
the
other Status Byte bits are asserted along with their corresponding mask bits in the
Service Request Enable Register, then the RQSIMSS
bit
will be asserted.
This
allows the controlIer to test for the RQSIMSS bit for selected information (se1ected
by the mask bits in the Service Request Enable Register) automaticalIy without
having to mask and test the Status Byte manually.
RQS
is
in
response to a seriaI polI
and
is partialIy defined in the IEEE-488.1
specification and further defined
in
the IEEE-488.2 specifications. RQS will
be
true during a seriaI polI
if
the 395 has an SRQ true condition pending.
MSS
is
in
response
to
a *STB? query and is definedin the IEEE-488.2 specifications.
MSS will be true
if
the logical
AND
of
the Status Byte bits and a mask byte, the
Service Request Enable Register yields a true result
in
any bit location (except bit
6
of
course).
The
only
bits
used
in
the'395
are
bit
4 (DI05) and
bit
5
(DI06)
mentioned below.
Bit 5 (0106):
E8B
Standard Event Status Bit Summary Message. This is a summary message bit for
the Standard Event Status Register, see "Bit4 (DI05): MAV."
Bit 4 (0105): MAV
Message Available Queue Summary Bit. This bit is always true
if
another byte is
available to be output to the controlIer. When the queue is empty, the
MA
V
bit
is
cleared.
The remaining bits in the 395 Status Byte have no effect. The ESB bitis a summary
bit
for another status register, called the Standard Event Status register, which is
used to extend the types
of
status information available to the controlIer from the
instrument's status functions. The IEEE-488-2 document defines all eight bits for
particular functions. The 395 only uses a subset
of
these. They are as follows:
Bit 7: Power On (not used)
Bit 6: User Request (not used)
Bit 5: Command Error
Set to true whenever a syntax error is encountered
in
the command string to the 395.
Remote Operation 5-53
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