Freescale Semiconductor MPC5200B - Page 33

List of Tables
Table Page
Number Number
MPC5200B Users Guide, Rev. 1
LOT-10 Freescale Semiconductor
20-16 BDLC Receiver VPW Symbol Timing for Binary Frequencies ...........................................................................20-21
20-17 BDLC Receiver VPW 4X Symbol Timing for Integer Frequencies .....................................................................20-21
20-18 BDLC Receiver VPW 4X Symbol Timing for Binary Frequencies .....................................................................20-21
20-19 BDLC module J1850 Error Summary ...................................................................................................................20-27
20-20 IFR Control Bit Priority Encoding ........................................................................................................................20-38
21-1 TLM Link-DR Instructions .....................................................................................................................................21-7
21-2 TLM Test Instruction Encoding ..............................................................................................................................21-8
21-3 Device ID Register = 0001101D hex ......................................................................................................................21-8
21-4 COP/BDM Interface Signals ..................................................................................................................................21-9