PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 15-27
15.2.17 AC97 Status Data Register (0x2C)—AC97Data
This read-only register contains the received response of a AC97 read command. If this register contains new data then the SR[DATA_VALID]
will be set to one by the receiver. A read access to this register cleared the SR[DATA_VALID] bit.
Table 15-37. AC97 Status Data Register (0x2C)—AC97Data
15.2.18 Interrupt Vector Register (0x30)—IVR
This register is not used since the MPC5200 does not use interrupt vectors supplied by the peripherals.
Bit Name Description
0 AC97 CMD Enhanced AC97 Mode—AC97 Command
This bit indicates if the access to the Control Register is a read or write access. It will
be paste to the Slot1 bit 19.
0 = write access
1 = read access
other Modes—Reserved
1:7 AC97 Control
Register Index
Enhanced AC97 Mode—AC97 address Register
This register contains target control register address. It will be paste to the Slot1 bit
18 to 12.
other Modes—Reserved
6:23 AC97 Command
Data
Enhanced AC97 Mode—AC97 Command Data Register
This register is used define the command data value for a write command. It will be
paste to the Slot2 bit 19 to 4.
other Modes—Reserved
24:31 — Reserved
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lsb
R
Reserved
AC97 Register Index Echo AC97 Control Register Read Data[15:8]
W Reserved
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 39 31
R AC97 Control Register Read Data[7:0] Reserved
W Reserved
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Name Description
0—Reserved
1:7 AC97 Register
Index Echo
Enhanced AC97 Mode—AC97 Register Index Echo
This register contains the received Register Index Echo from the RX Slot0.
other Modes—Reserved
6:23 AC97 Control
Register
ReadData
Enhanced AC97 Mode—AC97 Control Register Read Data
This register contains the received control data from Rx Slot2.
other Modes—Reserved
24:31 — Reserved
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