Honeywell Series A - Page 351

8. Maintenance, Checkout, and Calibration
8.10. FIM Self-Test Diagnostic Codes
R400 Experion PKS Series A Fieldbus Interface Module User's Guide 351
July 2010 Honeywell
Test Code Target Device(s) Failure Modes Function
T022
Upper RAM Word
Test
RAM, CPU
Verifies that word patterns can be
written and read back as bytes,
half-words, words, misaligned
words.
T023
Lower RAM Byte
Access Test
RAM, CPU
Verifies that writing a string of 8
bytes can be read back as 2
correct words, and as 8 bytes.
T024
Upper RAM Byte
Access Test
RAM, CPU
Verifies that writing a string of 8
bytes can be read back as 2
correct words, and as 8 bytes.
T025
Lower RAM Data
Parity Interrupt Test
RAM, CPU
Verifies that the RAM data parity
error detection on this memory
bank is working by enabling data
parity checking and the machine
check exception after accessing
an area of bad parity has been
created in RAM. RAM parity is
enabled from this point on.
T026
Upper RAM Data
Parity Interrupt Test
RAM, CPU
Verifies that the RAM data parity
error detection on this memory
bank is working by enabling data
parity checking and the machine
check exception after accessing
an area of bad parity has been
created in RAM. RAM parity is
enabled from this point on.
T030
RAM Parity Sweep
Test
Parity errors force
destructive testing
of RAM
Reads RAM until the end or a
parity error is detected.
T031
RAM Parity Sweep
Time Test
Instruction cache,
RAM, Oscillator
Checks the reasonableness of the
time needed to perform the
previous test (T030). (The time is
not measured if a parity error is
detected and memory is flushed.
T032
RAM Memory
Retention Test
Reset circuit
The magic numbers are checked
to see if the data in RAM may still
be valid. In the absence of parity
errors, RAM is considered valid at
boot level. It passes test, bumps