HP 1660 Series User Manual

To test the single-clock, single-edge, state acquisition ( logic analyzer) 3-23
Set up the equipment 3-23
Set up the logic analyzer 3-24
Connect the logic analyzer 3-25
Verify t he t est signal 3-28
Check the setup/hold combination 3-30
Test the next channels 3-34
To test the multiple-clock, multiple-edge, state acquisition (logic analyzer) 3-35
Set up the equipment 3-35
Set up the logic analyzer 3-36
Connect the logic analyzer 3-38
Verify t he t est signal 3-40
Check the setup/hold with single clock edges, multiple clocks 3-42
Test the next channels 3-46
To test the single-clock, multiple-edge, state acquisition (logic analyzer) 3-47
Set up the equipment 3-47
Set up the logic analyzer 3-48
Connect the logic analyzer 3-50
Verify t he t est signal 3-52
Check the setup/hold with single clock, multiple clock edges 3-54
Test the next channels 3-58
To test the time interval accuracy (logic analyzer) 3-59
Set up the equipment 3-59
Set up the logic analyzer 3-60
Connect the logic analyzer 3-62
Acquire the data 3-63
To test the CAL OUTPUT ports (oscilloscope) 3-64
Set up the equipment 3-64
Set up the logic analyzer 3-65
Verify the DC CAL OUTPUT port 3-66
Set up the logic analyzer 3-67
Verify the AC CAL OUTPUT port 3-67
To test the input resistance (oscilloscope) 3-68
Set up the equipment 3-68
Set up the logic analyzer 3-69
Connect the logic analyzer 3-70
Acquire the data 3-71
Perform an operational accuracy calibration 3-71
Contents
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HP 1660 Series Specifications

General

Category	Logic Analyzer
Glitch Trigger	Yes
Pattern Trigger	Yes
State Analysis	Yes
Transitional Timing	Yes
Trigger Modes	Edge, Pattern, Glitch