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HP 1660 Series User Manual

HP 1660 Series
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RAM TestRAM Test
The RAM test checks the video RAM (VRAM), system dynamic RAM (DRAM), and static
RAM memory within the real time clock IC. The microprocessor first performs a write/read
in each memory location of the VRAM. At each VRAM memory location a test pattern is
written, read, and compared. An inverse test pattern is then written, read, and compared.
After verifying correct operation of the VRAM, the System RAM and real t ime clock RAM are
t ested in a similar fashion.
Passing the RAM t est implies that the microprocessor can access each VRAM memory
location and that each VRAM memory location can store a logical "1" or a logical "0." If the
VRAM is functioning properly, the logic analyzer can construct a correct, undistorted display.
Passing the RAM t est also implies t hat the memory locat ions of syst em RAM can be accessed
by the microprocessor and the data in RAM is intact, and that the memory locations inside
the real time clock IC can store a logical "1" or a logical "0."
Interrupt TestInterrupt Test
The Interrupt Test checks the microprocessor interrupt circuitry. With all interrupts
disabled from t heir source, t he microprocessor wait s for a short period of t ime t o see if any of
the interrupt lines are asserted. An asserted interrupt line during the wait period signifies
incorrect functioning of t he device generating the interrupt or the interrupt circuitry itself.
Those interrupts that can be asserted under software control are exercised to verify
functionality.
Passing the Interrupt Test implies that the interrupt circuitry is functioning properly.
Passing the Interrupt Test also implies t hat t he int errupt generating devices are also
funct ioning properly and not generat ing false int errupts. This means t hat t he microprocessor
can execute t he operating system code and properly service interrupts generated by pressing
a front panel key or receiving an HP-IB or RS-232C command.
System Tests (System PV)
The syst em t est s are functional performance verificat ion t ests. The following describes the
system test s:
ROM Test ROM Test
The ROM t est performs several checksum test s on various read only memory element s,
including the system ROM as well as the various software modules present in flash ROM.
Passing t he ROM test implies t hat t he microprocessor can access each ROM memory address
and that each ROM segment provides checksums that match previously calculated values.
RAM TestRAM Test
The RAM test performs a write/read operation in each memory location in system dynamic
RAM ( DRAM) . The video RAM in the display subsystem and the acquisition RAM in the data
acquisition subsystem are not tested as part of the RAM test and are tested elsewhere. At
each DRAM memory location, the code that resides at that location is stored in a
microprocessor register. A test pattern is then stored at the memory location, read, and
compared. An inverse test pattern is then stored, read, and compared. The original code is
then restored to the memory location. This continues until all DRAM memory locations have
been t est ed. The st at ic RAM in the real t ime clock chip is also test ed in a similar fashion.
Passing the RAM t est implies that all RAM memory locat ions can be accessed by the
microprocessor and that each memory location can store a logical "1" or a logical "0."
Theory of Operation
System Tests (System PV)
8–13

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HP 1660 Series Specifications

General IconGeneral
CategoryLogic Analyzer
Glitch TriggerYes
Pattern TriggerYes
State AnalysisYes
Transitional TimingYes
Trigger ModesEdge, Pattern, Glitch

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